Line data Source code
1 : /* SPDX-License-Identifier: BSD-3-Clause
2 : * Copyright (C) 2015 Intel Corporation. All rights reserved.
3 : * Copyright (c) 2020, 2021 Mellanox Technologies LTD. All rights reserved.
4 : * Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
5 : */
6 :
7 : #ifndef __NVME_INTERNAL_H__
8 : #define __NVME_INTERNAL_H__
9 :
10 : #include "spdk/config.h"
11 : #include "spdk/likely.h"
12 : #include "spdk/stdinc.h"
13 :
14 : #include "spdk/nvme.h"
15 :
16 : #if defined(__i386__) || defined(__x86_64__)
17 : #include <x86intrin.h>
18 : #endif
19 :
20 : #include "spdk/queue.h"
21 : #include "spdk/barrier.h"
22 : #include "spdk/bit_array.h"
23 : #include "spdk/mmio.h"
24 : #include "spdk/pci_ids.h"
25 : #include "spdk/util.h"
26 : #include "spdk/memory.h"
27 : #include "spdk/nvme_intel.h"
28 : #include "spdk/nvmf_spec.h"
29 : #include "spdk/tree.h"
30 : #include "spdk/uuid.h"
31 :
32 : #include "spdk_internal/assert.h"
33 : #include "spdk/log.h"
34 :
35 : extern pid_t g_spdk_nvme_pid;
36 :
37 : extern struct spdk_nvme_transport_opts g_spdk_nvme_transport_opts;
38 :
39 : /*
40 : * Some Intel devices support vendor-unique read latency log page even
41 : * though the log page directory says otherwise.
42 : */
43 : #define NVME_INTEL_QUIRK_READ_LATENCY 0x1
44 :
45 : /*
46 : * Some Intel devices support vendor-unique write latency log page even
47 : * though the log page directory says otherwise.
48 : */
49 : #define NVME_INTEL_QUIRK_WRITE_LATENCY 0x2
50 :
51 : /*
52 : * The controller needs a delay before starts checking the device
53 : * readiness, which is done by reading the NVME_CSTS_RDY bit.
54 : */
55 : #define NVME_QUIRK_DELAY_BEFORE_CHK_RDY 0x4
56 :
57 : /*
58 : * The controller performs best when I/O is split on particular
59 : * LBA boundaries.
60 : */
61 : #define NVME_INTEL_QUIRK_STRIPING 0x8
62 :
63 : /*
64 : * The controller needs a delay after allocating an I/O queue pair
65 : * before it is ready to accept I/O commands.
66 : */
67 : #define NVME_QUIRK_DELAY_AFTER_QUEUE_ALLOC 0x10
68 :
69 : /*
70 : * Earlier NVMe devices do not indicate whether unmapped blocks
71 : * will read all zeroes or not. This define indicates that the
72 : * device does in fact read all zeroes after an unmap event
73 : */
74 : #define NVME_QUIRK_READ_ZERO_AFTER_DEALLOCATE 0x20
75 :
76 : /*
77 : * The controller doesn't handle Identify value others than 0 or 1 correctly.
78 : */
79 : #define NVME_QUIRK_IDENTIFY_CNS 0x40
80 :
81 : /*
82 : * The controller supports Open Channel command set if matching additional
83 : * condition, like the first byte (value 0x1) in the vendor specific
84 : * bits of the namespace identify structure is set.
85 : */
86 : #define NVME_QUIRK_OCSSD 0x80
87 :
88 : /*
89 : * The controller has an Intel vendor ID but does not support Intel vendor-specific
90 : * log pages. This is primarily for QEMU emulated SSDs which report an Intel vendor
91 : * ID but do not support these log pages.
92 : */
93 : #define NVME_INTEL_QUIRK_NO_LOG_PAGES 0x100
94 :
95 : /*
96 : * The controller does not set SHST_COMPLETE in a reasonable amount of time. This
97 : * is primarily seen in virtual VMWare NVMe SSDs. This quirk merely adds an additional
98 : * error message that on VMWare NVMe SSDs, the shutdown timeout may be expected.
99 : */
100 : #define NVME_QUIRK_SHST_COMPLETE 0x200
101 :
102 : /*
103 : * The controller requires an extra delay before starting the initialization process
104 : * during attach.
105 : */
106 : #define NVME_QUIRK_DELAY_BEFORE_INIT 0x400
107 :
108 : /*
109 : * Some SSDs exhibit poor performance with the default SPDK NVMe IO queue size.
110 : * This quirk will increase the default to 1024 which matches other operating
111 : * systems, at the cost of some extra memory usage. Users can still override
112 : * the increased default by changing the spdk_nvme_io_qpair_opts when allocating
113 : * a new queue pair.
114 : */
115 : #define NVME_QUIRK_MINIMUM_IO_QUEUE_SIZE 0x800
116 :
117 : /**
118 : * The maximum access width to PCI memory space is 8 Bytes, don't use AVX2 or
119 : * SSE instructions to optimize the memory access(memcpy or memset) larger than
120 : * 8 Bytes.
121 : */
122 : #define NVME_QUIRK_MAXIMUM_PCI_ACCESS_WIDTH 0x1000
123 :
124 : /**
125 : * The SSD does not support OPAL even through it sets the security bit in OACS.
126 : */
127 : #define NVME_QUIRK_OACS_SECURITY 0x2000
128 :
129 : /**
130 : * Intel P55XX SSDs can't support Dataset Management command with SGL format,
131 : * so use PRP with DSM command.
132 : */
133 : #define NVME_QUIRK_NO_SGL_FOR_DSM 0x4000
134 :
135 : /**
136 : * Maximum Data Transfer Size(MDTS) excludes interleaved metadata.
137 : */
138 : #define NVME_QUIRK_MDTS_EXCLUDE_MD 0x8000
139 :
140 : /**
141 : * Force not to use SGL even the controller report that it can
142 : * support it.
143 : */
144 : #define NVME_QUIRK_NOT_USE_SGL 0x10000
145 :
146 : /*
147 : * Some SSDs require the admin submission queue size to equate to an even
148 : * 4KiB multiple.
149 : */
150 : #define NVME_QUIRK_MINIMUM_ADMIN_QUEUE_SIZE 0x20000
151 :
152 : #define NVME_MAX_ASYNC_EVENTS (8)
153 :
154 : #define NVME_MAX_ADMIN_TIMEOUT_IN_SECS (30)
155 :
156 : /* Maximum log page size to fetch for AERs. */
157 : #define NVME_MAX_AER_LOG_SIZE (4096)
158 :
159 : /*
160 : * NVME_MAX_IO_QUEUES in nvme_spec.h defines the 64K spec-limit, but this
161 : * define specifies the maximum number of queues this driver will actually
162 : * try to configure, if available.
163 : */
164 : #define DEFAULT_MAX_IO_QUEUES (1024)
165 : #define DEFAULT_ADMIN_QUEUE_SIZE (32)
166 : #define DEFAULT_IO_QUEUE_SIZE (256)
167 : #define DEFAULT_IO_QUEUE_SIZE_FOR_QUIRK (1024) /* Matches Linux kernel driver */
168 :
169 : #define DEFAULT_IO_QUEUE_REQUESTS (512)
170 :
171 : #define SPDK_NVME_DEFAULT_RETRY_COUNT (4)
172 :
173 : #define SPDK_NVME_TRANSPORT_ACK_TIMEOUT_DISABLED (0)
174 : #define SPDK_NVME_DEFAULT_TRANSPORT_ACK_TIMEOUT SPDK_NVME_TRANSPORT_ACK_TIMEOUT_DISABLED
175 :
176 : #define SPDK_NVME_TRANSPORT_TOS_DISABLED (0)
177 :
178 : #define MIN_KEEP_ALIVE_TIMEOUT_IN_MS (10000)
179 :
180 : /* We want to fit submission and completion rings each in a single 2MB
181 : * hugepage to ensure physical address contiguity.
182 : */
183 : #define MAX_IO_QUEUE_ENTRIES (VALUE_2MB / spdk_max( \
184 : sizeof(struct spdk_nvme_cmd), \
185 : sizeof(struct spdk_nvme_cpl)))
186 :
187 : /* Default timeout for fabrics connect commands. */
188 : #ifdef DEBUG
189 : #define NVME_FABRIC_CONNECT_COMMAND_TIMEOUT 0
190 : #else
191 : /* 500 millisecond timeout. */
192 : #define NVME_FABRIC_CONNECT_COMMAND_TIMEOUT 500000
193 : #endif
194 :
195 : /* This value indicates that a read from a PCIe register is invalid. This can happen when a device is no longer present */
196 : #define SPDK_NVME_INVALID_REGISTER_VALUE 0xFFFFFFFFu
197 :
198 : enum nvme_payload_type {
199 : NVME_PAYLOAD_TYPE_INVALID = 0,
200 :
201 : /** nvme_request::u.payload.contig_buffer is valid for this request */
202 : NVME_PAYLOAD_TYPE_CONTIG,
203 :
204 : /** nvme_request::u.sgl is valid for this request */
205 : NVME_PAYLOAD_TYPE_SGL,
206 : };
207 :
208 : /** Boot partition write states */
209 : enum nvme_bp_write_state {
210 : SPDK_NVME_BP_WS_DOWNLOADING = 0x0,
211 : SPDK_NVME_BP_WS_DOWNLOADED = 0x1,
212 : SPDK_NVME_BP_WS_REPLACE = 0x2,
213 : SPDK_NVME_BP_WS_ACTIVATE = 0x3,
214 : };
215 :
216 : /**
217 : * Descriptor for a request data payload.
218 : */
219 : struct nvme_payload {
220 : /**
221 : * Functions for retrieving physical addresses for scattered payloads.
222 : */
223 : spdk_nvme_req_reset_sgl_cb reset_sgl_fn;
224 : spdk_nvme_req_next_sge_cb next_sge_fn;
225 :
226 : /**
227 : * Extended IO options passed by the user
228 : */
229 : struct spdk_nvme_ns_cmd_ext_io_opts *opts;
230 : /**
231 : * If reset_sgl_fn == NULL, this is a contig payload, and contig_or_cb_arg contains the
232 : * virtual memory address of a single virtually contiguous buffer.
233 : *
234 : * If reset_sgl_fn != NULL, this is a SGL payload, and contig_or_cb_arg contains the
235 : * cb_arg that will be passed to the SGL callback functions.
236 : */
237 : void *contig_or_cb_arg;
238 :
239 : /** Virtual memory address of a single virtually contiguous metadata buffer */
240 : void *md;
241 : };
242 :
243 : #define NVME_PAYLOAD_CONTIG(contig_, md_) \
244 : (struct nvme_payload) { \
245 : .reset_sgl_fn = NULL, \
246 : .next_sge_fn = NULL, \
247 : .contig_or_cb_arg = (contig_), \
248 : .md = (md_), \
249 : }
250 :
251 : #define NVME_PAYLOAD_SGL(reset_sgl_fn_, next_sge_fn_, cb_arg_, md_) \
252 : (struct nvme_payload) { \
253 : .reset_sgl_fn = (reset_sgl_fn_), \
254 : .next_sge_fn = (next_sge_fn_), \
255 : .contig_or_cb_arg = (cb_arg_), \
256 : .md = (md_), \
257 : }
258 :
259 : static inline enum nvme_payload_type
260 143 : nvme_payload_type(const struct nvme_payload *payload) {
261 143 : return payload->reset_sgl_fn ? NVME_PAYLOAD_TYPE_SGL : NVME_PAYLOAD_TYPE_CONTIG;
262 : }
263 :
264 : struct nvme_error_cmd {
265 : bool do_not_submit;
266 : uint64_t timeout_tsc;
267 : uint32_t err_count;
268 : uint8_t opc;
269 : struct spdk_nvme_status status;
270 : TAILQ_ENTRY(nvme_error_cmd) link;
271 : };
272 :
273 : struct nvme_request {
274 : struct spdk_nvme_cmd cmd;
275 :
276 : uint8_t retries;
277 :
278 : uint8_t timed_out : 1;
279 :
280 : /**
281 : * True if the request is in the queued_req list.
282 : */
283 : uint8_t queued : 1;
284 : uint8_t reserved : 6;
285 :
286 : /**
287 : * Number of children requests still outstanding for this
288 : * request which was split into multiple child requests.
289 : */
290 : uint16_t num_children;
291 :
292 : /**
293 : * Offset in bytes from the beginning of payload for this request.
294 : * This is used for I/O commands that are split into multiple requests.
295 : */
296 : uint32_t payload_offset;
297 : uint32_t md_offset;
298 :
299 : uint32_t payload_size;
300 :
301 : /**
302 : * Timeout ticks for error injection requests, can be extended in future
303 : * to support per-request timeout feature.
304 : */
305 : uint64_t timeout_tsc;
306 :
307 : /**
308 : * Data payload for this request's command.
309 : */
310 : struct nvme_payload payload;
311 :
312 : spdk_nvme_cmd_cb cb_fn;
313 : void *cb_arg;
314 : STAILQ_ENTRY(nvme_request) stailq;
315 :
316 : struct spdk_nvme_qpair *qpair;
317 :
318 : /*
319 : * The value of spdk_get_ticks() when the request was submitted to the hardware.
320 : * Only set if ctrlr->timeout_enabled is true.
321 : */
322 : uint64_t submit_tick;
323 :
324 : /**
325 : * The active admin request can be moved to a per process pending
326 : * list based on the saved pid to tell which process it belongs
327 : * to. The cpl saves the original completion information which
328 : * is used in the completion callback.
329 : * NOTE: these below two fields are only used for admin request.
330 : */
331 : pid_t pid;
332 : struct spdk_nvme_cpl cpl;
333 :
334 : uint32_t md_size;
335 :
336 : /**
337 : * The following members should not be reordered with members
338 : * above. These members are only needed when splitting
339 : * requests which is done rarely, and the driver is careful
340 : * to not touch the following fields until a split operation is
341 : * needed, to avoid touching an extra cacheline.
342 : */
343 :
344 : /**
345 : * Points to the outstanding child requests for a parent request.
346 : * Only valid if a request was split into multiple children
347 : * requests, and is not initialized for non-split requests.
348 : */
349 : TAILQ_HEAD(, nvme_request) children;
350 :
351 : /**
352 : * Linked-list pointers for a child request in its parent's list.
353 : */
354 : TAILQ_ENTRY(nvme_request) child_tailq;
355 :
356 : /**
357 : * Points to a parent request if part of a split request,
358 : * NULL otherwise.
359 : */
360 : struct nvme_request *parent;
361 :
362 : /**
363 : * Completion status for a parent request. Initialized to all 0's
364 : * (SUCCESS) before child requests are submitted. If a child
365 : * request completes with error, the error status is copied here,
366 : * to ensure that the parent request is also completed with error
367 : * status once all child requests are completed.
368 : */
369 : struct spdk_nvme_cpl parent_status;
370 :
371 : /**
372 : * The user_cb_fn and user_cb_arg fields are used for holding the original
373 : * callback data when using nvme_allocate_request_user_copy.
374 : */
375 : spdk_nvme_cmd_cb user_cb_fn;
376 : void *user_cb_arg;
377 : void *user_buffer;
378 :
379 : /** Sequence of accel operations associated with this request */
380 : void *accel_sequence;
381 : };
382 :
383 : struct nvme_completion_poll_status {
384 : struct spdk_nvme_cpl cpl;
385 : uint64_t timeout_tsc;
386 : /**
387 : * DMA buffer retained throughout the duration of the command. It'll be released
388 : * automatically if the command times out, otherwise the user is responsible for freeing it.
389 : */
390 : void *dma_data;
391 : bool done;
392 : /* This flag indicates that the request has been timed out and the memory
393 : must be freed in a completion callback */
394 : bool timed_out;
395 : };
396 :
397 : struct nvme_async_event_request {
398 : struct spdk_nvme_ctrlr *ctrlr;
399 : struct nvme_request *req;
400 : struct spdk_nvme_cpl cpl;
401 : };
402 :
403 : enum nvme_qpair_state {
404 : NVME_QPAIR_DISCONNECTED,
405 : NVME_QPAIR_DISCONNECTING,
406 : NVME_QPAIR_CONNECTING,
407 : NVME_QPAIR_CONNECTED,
408 : NVME_QPAIR_ENABLING,
409 : NVME_QPAIR_ENABLED,
410 : NVME_QPAIR_DESTROYING,
411 : };
412 :
413 : enum nvme_qpair_connect_state {
414 : NVME_QPAIR_CONNECT_STATE_CONNECTING,
415 : NVME_QPAIR_CONNECT_STATE_AUTHENTICATING,
416 : NVME_QPAIR_CONNECT_STATE_CONNECTED,
417 : NVME_QPAIR_CONNECT_STATE_FAILED,
418 : };
419 :
420 : enum nvme_qpair_auth_state {
421 : NVME_QPAIR_AUTH_STATE_NEGOTIATE,
422 : NVME_QPAIR_AUTH_STATE_AWAIT_NEGOTIATE,
423 : NVME_QPAIR_AUTH_STATE_AWAIT_CHALLENGE,
424 : NVME_QPAIR_AUTH_STATE_AWAIT_REPLY,
425 : NVME_QPAIR_AUTH_STATE_AWAIT_SUCCESS1,
426 : NVME_QPAIR_AUTH_STATE_AWAIT_SUCCESS2,
427 : NVME_QPAIR_AUTH_STATE_AWAIT_FAILURE2,
428 : NVME_QPAIR_AUTH_STATE_DONE,
429 : };
430 :
431 : /* Authentication transaction required (authreq.atr) */
432 : #define NVME_QPAIR_AUTH_FLAG_ATR (1 << 0)
433 : /* Authentication and secure channel required (authreq.ascr) */
434 : #define NVME_QPAIR_AUTH_FLAG_ASCR (1 << 1)
435 :
436 : /* Maximum size of a digest */
437 : #define NVME_AUTH_DIGEST_MAX_SIZE 64
438 :
439 : struct nvme_auth {
440 : /* State of the authentication */
441 : enum nvme_qpair_auth_state state;
442 : /* Status of the authentication */
443 : int status;
444 : /* Transaction ID */
445 : uint16_t tid;
446 : /* Flags */
447 : uint32_t flags;
448 : /* Selected hash function */
449 : uint8_t hash;
450 : /* Buffer used for controller challenge */
451 : uint8_t challenge[NVME_AUTH_DIGEST_MAX_SIZE];
452 : };
453 :
454 : struct spdk_nvme_qpair {
455 : struct spdk_nvme_ctrlr *ctrlr;
456 :
457 : uint16_t id;
458 :
459 : uint8_t qprio: 2;
460 :
461 : uint8_t state: 3;
462 :
463 : uint8_t async: 1;
464 :
465 : uint8_t is_new_qpair: 1;
466 :
467 : uint8_t abort_dnr: 1;
468 : /*
469 : * Members for handling IO qpair deletion inside of a completion context.
470 : * These are specifically defined as single bits, so that they do not
471 : * push this data structure out to another cacheline.
472 : */
473 : uint8_t in_completion_context: 1;
474 : uint8_t delete_after_completion_context: 1;
475 :
476 : /*
477 : * Set when no deletion notification is needed. For example, the process
478 : * which allocated this qpair exited unexpectedly.
479 : */
480 : uint8_t no_deletion_notification_needed: 1;
481 :
482 : uint8_t last_fuse: 2;
483 :
484 : uint8_t transport_failure_reason: 3;
485 : uint8_t last_transport_failure_reason: 3;
486 :
487 : /* The user is destroying qpair */
488 : uint8_t destroy_in_progress: 1;
489 :
490 : /* Number of IO outstanding at transport level */
491 : uint16_t queue_depth;
492 :
493 : enum spdk_nvme_transport_type trtype;
494 :
495 : uint32_t num_outstanding_reqs;
496 :
497 : /* request object used only for this qpair's FABRICS/CONNECT command (if needed) */
498 : struct nvme_request *reserved_req;
499 :
500 : STAILQ_HEAD(, nvme_request) free_req;
501 : STAILQ_HEAD(, nvme_request) queued_req;
502 :
503 : /* List entry for spdk_nvme_transport_poll_group::qpairs */
504 : STAILQ_ENTRY(spdk_nvme_qpair) poll_group_stailq;
505 :
506 : /** Commands opcode in this list will return error */
507 : TAILQ_HEAD(, nvme_error_cmd) err_cmd_head;
508 : /** Requests in this list will return error */
509 : STAILQ_HEAD(, nvme_request) err_req_head;
510 :
511 : struct spdk_nvme_ctrlr_process *active_proc;
512 :
513 : struct spdk_nvme_transport_poll_group *poll_group;
514 :
515 : void *poll_group_tailq_head;
516 :
517 : const struct spdk_nvme_transport *transport;
518 :
519 : /* Entries below here are not touched in the main I/O path. */
520 :
521 : struct nvme_completion_poll_status *poll_status;
522 : enum nvme_qpair_connect_state connect_state;
523 :
524 : /* List entry for spdk_nvme_ctrlr::active_io_qpairs */
525 : TAILQ_ENTRY(spdk_nvme_qpair) tailq;
526 :
527 : /* List entry for spdk_nvme_ctrlr_process::allocated_io_qpairs */
528 : TAILQ_ENTRY(spdk_nvme_qpair) per_process_tailq;
529 :
530 : STAILQ_HEAD(, nvme_request) aborting_queued_req;
531 :
532 : void *req_buf;
533 :
534 : /* In-band authentication state */
535 : struct nvme_auth auth;
536 : };
537 :
538 : struct spdk_nvme_poll_group {
539 : void *ctx;
540 : struct spdk_nvme_accel_fn_table accel_fn_table;
541 : STAILQ_HEAD(, spdk_nvme_transport_poll_group) tgroups;
542 : bool in_process_completions;
543 : };
544 :
545 : struct spdk_nvme_transport_poll_group {
546 : struct spdk_nvme_poll_group *group;
547 : const struct spdk_nvme_transport *transport;
548 : STAILQ_HEAD(, spdk_nvme_qpair) connected_qpairs;
549 : STAILQ_HEAD(, spdk_nvme_qpair) disconnected_qpairs;
550 : STAILQ_ENTRY(spdk_nvme_transport_poll_group) link;
551 : uint32_t num_connected_qpairs;
552 : };
553 :
554 : struct spdk_nvme_ns {
555 : struct spdk_nvme_ctrlr *ctrlr;
556 : uint32_t sector_size;
557 :
558 : /*
559 : * Size of data transferred as part of each block,
560 : * including metadata if FLBAS indicates the metadata is transferred
561 : * as part of the data buffer at the end of each LBA.
562 : */
563 : uint32_t extended_lba_size;
564 :
565 : uint32_t md_size;
566 : uint32_t pi_type;
567 : uint32_t sectors_per_max_io;
568 : uint32_t sectors_per_max_io_no_md;
569 : uint32_t sectors_per_stripe;
570 : uint32_t id;
571 : uint16_t flags;
572 : bool active;
573 :
574 : /* Command Set Identifier */
575 : enum spdk_nvme_csi csi;
576 :
577 : /* Namespace Identification Descriptor List (CNS = 03h) */
578 : uint8_t id_desc_list[4096];
579 :
580 : uint32_t ana_group_id;
581 : enum spdk_nvme_ana_state ana_state;
582 :
583 : /* Identify Namespace data. */
584 : struct spdk_nvme_ns_data nsdata;
585 :
586 : /* Zoned Namespace Command Set Specific Identify Namespace data. */
587 : struct spdk_nvme_zns_ns_data *nsdata_zns;
588 :
589 : RB_ENTRY(spdk_nvme_ns) node;
590 : };
591 :
592 : /**
593 : * State of struct spdk_nvme_ctrlr (in particular, during initialization).
594 : */
595 : enum nvme_ctrlr_state {
596 : /**
597 : * Wait before initializing the controller.
598 : */
599 : NVME_CTRLR_STATE_INIT_DELAY,
600 :
601 : /**
602 : * Connect the admin queue.
603 : */
604 : NVME_CTRLR_STATE_CONNECT_ADMINQ,
605 :
606 : /**
607 : * Controller has not started initialized yet.
608 : */
609 : NVME_CTRLR_STATE_INIT = NVME_CTRLR_STATE_CONNECT_ADMINQ,
610 :
611 : /**
612 : * Waiting for admin queue to connect.
613 : */
614 : NVME_CTRLR_STATE_WAIT_FOR_CONNECT_ADMINQ,
615 :
616 : /**
617 : * Read Version (VS) register.
618 : */
619 : NVME_CTRLR_STATE_READ_VS,
620 :
621 : /**
622 : * Waiting for Version (VS) register to be read.
623 : */
624 : NVME_CTRLR_STATE_READ_VS_WAIT_FOR_VS,
625 :
626 : /**
627 : * Read Capabilities (CAP) register.
628 : */
629 : NVME_CTRLR_STATE_READ_CAP,
630 :
631 : /**
632 : * Waiting for Capabilities (CAP) register to be read.
633 : */
634 : NVME_CTRLR_STATE_READ_CAP_WAIT_FOR_CAP,
635 :
636 : /**
637 : * Check EN to prepare for controller initialization.
638 : */
639 : NVME_CTRLR_STATE_CHECK_EN,
640 :
641 : /**
642 : * Waiting for CC to be read as part of EN check.
643 : */
644 : NVME_CTRLR_STATE_CHECK_EN_WAIT_FOR_CC,
645 :
646 : /**
647 : * Waiting for CSTS.RDY to transition from 0 to 1 so that CC.EN may be set to 0.
648 : */
649 : NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1,
650 :
651 : /**
652 : * Waiting for CSTS register to be read as part of waiting for CSTS.RDY = 1.
653 : */
654 : NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1_WAIT_FOR_CSTS,
655 :
656 : /**
657 : * Disabling the controller by setting CC.EN to 0.
658 : */
659 : NVME_CTRLR_STATE_SET_EN_0,
660 :
661 : /**
662 : * Waiting for the CC register to be read as part of disabling the controller.
663 : */
664 : NVME_CTRLR_STATE_SET_EN_0_WAIT_FOR_CC,
665 :
666 : /**
667 : * Waiting for CSTS.RDY to transition from 1 to 0 so that CC.EN may be set to 1.
668 : */
669 : NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0,
670 :
671 : /**
672 : * Waiting for CSTS register to be read as part of waiting for CSTS.RDY = 0.
673 : */
674 : NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0_WAIT_FOR_CSTS,
675 :
676 : /**
677 : * The controller is disabled. (CC.EN and CSTS.RDY are 0.)
678 : */
679 : NVME_CTRLR_STATE_DISABLED,
680 :
681 : /**
682 : * Enable the controller by writing CC.EN to 1
683 : */
684 : NVME_CTRLR_STATE_ENABLE,
685 :
686 : /**
687 : * Waiting for CC register to be written as part of enabling the controller.
688 : */
689 : NVME_CTRLR_STATE_ENABLE_WAIT_FOR_CC,
690 :
691 : /**
692 : * Waiting for CSTS.RDY to transition from 0 to 1 after enabling the controller.
693 : */
694 : NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1,
695 :
696 : /**
697 : * Waiting for CSTS register to be read as part of waiting for CSTS.RDY = 1.
698 : */
699 : NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1_WAIT_FOR_CSTS,
700 :
701 : /**
702 : * Reset the Admin queue of the controller.
703 : */
704 : NVME_CTRLR_STATE_RESET_ADMIN_QUEUE,
705 :
706 : /**
707 : * Identify Controller command will be sent to then controller.
708 : */
709 : NVME_CTRLR_STATE_IDENTIFY,
710 :
711 : /**
712 : * Waiting for Identify Controller command be completed.
713 : */
714 : NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY,
715 :
716 : /**
717 : * Configure AER of the controller.
718 : */
719 : NVME_CTRLR_STATE_CONFIGURE_AER,
720 :
721 : /**
722 : * Waiting for the Configure AER to be completed.
723 : */
724 : NVME_CTRLR_STATE_WAIT_FOR_CONFIGURE_AER,
725 :
726 : /**
727 : * Set Keep Alive Timeout of the controller.
728 : */
729 : NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT,
730 :
731 : /**
732 : * Waiting for Set Keep Alive Timeout to be completed.
733 : */
734 : NVME_CTRLR_STATE_WAIT_FOR_KEEP_ALIVE_TIMEOUT,
735 :
736 : /**
737 : * Get Identify I/O Command Set Specific Controller data structure.
738 : */
739 : NVME_CTRLR_STATE_IDENTIFY_IOCS_SPECIFIC,
740 :
741 : /**
742 : * Waiting for Identify I/O Command Set Specific Controller command to be completed.
743 : */
744 : NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_IOCS_SPECIFIC,
745 :
746 : /**
747 : * Get Commands Supported and Effects log page for the Zoned Namespace Command Set.
748 : */
749 : NVME_CTRLR_STATE_GET_ZNS_CMD_EFFECTS_LOG,
750 :
751 : /**
752 : * Waiting for the Get Log Page command to be completed.
753 : */
754 : NVME_CTRLR_STATE_WAIT_FOR_GET_ZNS_CMD_EFFECTS_LOG,
755 :
756 : /**
757 : * Set Number of Queues of the controller.
758 : */
759 : NVME_CTRLR_STATE_SET_NUM_QUEUES,
760 :
761 : /**
762 : * Waiting for Set Num of Queues command to be completed.
763 : */
764 : NVME_CTRLR_STATE_WAIT_FOR_SET_NUM_QUEUES,
765 :
766 : /**
767 : * Get active Namespace list of the controller.
768 : */
769 : NVME_CTRLR_STATE_IDENTIFY_ACTIVE_NS,
770 :
771 : /**
772 : * Waiting for the Identify Active Namespace commands to be completed.
773 : */
774 : NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ACTIVE_NS,
775 :
776 : /**
777 : * Get Identify Namespace Data structure for each NS.
778 : */
779 : NVME_CTRLR_STATE_IDENTIFY_NS,
780 :
781 : /**
782 : * Waiting for the Identify Namespace commands to be completed.
783 : */
784 : NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS,
785 :
786 : /**
787 : * Get Identify Namespace Identification Descriptors.
788 : */
789 : NVME_CTRLR_STATE_IDENTIFY_ID_DESCS,
790 :
791 : /**
792 : * Get Identify I/O Command Set Specific Namespace data structure for each NS.
793 : */
794 : NVME_CTRLR_STATE_IDENTIFY_NS_IOCS_SPECIFIC,
795 :
796 : /**
797 : * Waiting for the Identify I/O Command Set Specific Namespace commands to be completed.
798 : */
799 : NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS_IOCS_SPECIFIC,
800 :
801 : /**
802 : * Waiting for the Identify Namespace Identification
803 : * Descriptors to be completed.
804 : */
805 : NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ID_DESCS,
806 :
807 : /**
808 : * Set supported log pages of the controller.
809 : */
810 : NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES,
811 :
812 : /**
813 : * Set supported log pages of INTEL controller.
814 : */
815 : NVME_CTRLR_STATE_SET_SUPPORTED_INTEL_LOG_PAGES,
816 :
817 : /**
818 : * Waiting for supported log pages of INTEL controller.
819 : */
820 : NVME_CTRLR_STATE_WAIT_FOR_SUPPORTED_INTEL_LOG_PAGES,
821 :
822 : /**
823 : * Set supported features of the controller.
824 : */
825 : NVME_CTRLR_STATE_SET_SUPPORTED_FEATURES,
826 :
827 : /**
828 : * Set Doorbell Buffer Config of the controller.
829 : */
830 : NVME_CTRLR_STATE_SET_DB_BUF_CFG,
831 :
832 : /**
833 : * Waiting for Doorbell Buffer Config to be completed.
834 : */
835 : NVME_CTRLR_STATE_WAIT_FOR_DB_BUF_CFG,
836 :
837 : /**
838 : * Set Host ID of the controller.
839 : */
840 : NVME_CTRLR_STATE_SET_HOST_ID,
841 :
842 : /**
843 : * Waiting for Set Host ID to be completed.
844 : */
845 : NVME_CTRLR_STATE_WAIT_FOR_HOST_ID,
846 :
847 : /**
848 : * Let transport layer do its part of initialization.
849 : */
850 : NVME_CTRLR_STATE_TRANSPORT_READY,
851 :
852 : /**
853 : * Controller initialization has completed and the controller is ready.
854 : */
855 : NVME_CTRLR_STATE_READY,
856 :
857 : /**
858 : * Controller initialization has an error.
859 : */
860 : NVME_CTRLR_STATE_ERROR,
861 :
862 : /**
863 : * Admin qpair was disconnected, controller needs to be re-initialized
864 : */
865 : NVME_CTRLR_STATE_DISCONNECTED,
866 : };
867 :
868 : #define NVME_TIMEOUT_INFINITE 0
869 : #define NVME_TIMEOUT_KEEP_EXISTING UINT64_MAX
870 :
871 : struct spdk_nvme_ctrlr_aer_completion_list {
872 : struct spdk_nvme_cpl cpl;
873 : STAILQ_ENTRY(spdk_nvme_ctrlr_aer_completion_list) link;
874 : };
875 :
876 : /*
877 : * Used to track properties for all processes accessing the controller.
878 : */
879 : struct spdk_nvme_ctrlr_process {
880 : /** Whether it is the primary process */
881 : bool is_primary;
882 :
883 : /** Process ID */
884 : pid_t pid;
885 :
886 : /** Active admin requests to be completed */
887 : STAILQ_HEAD(, nvme_request) active_reqs;
888 :
889 : TAILQ_ENTRY(spdk_nvme_ctrlr_process) tailq;
890 :
891 : /** Per process PCI device handle */
892 : struct spdk_pci_device *devhandle;
893 :
894 : /** Reference to track the number of attachment to this controller. */
895 : int ref;
896 :
897 : /** Allocated IO qpairs */
898 : TAILQ_HEAD(, spdk_nvme_qpair) allocated_io_qpairs;
899 :
900 : spdk_nvme_aer_cb aer_cb_fn;
901 : void *aer_cb_arg;
902 :
903 : /**
904 : * A function pointer to timeout callback function
905 : */
906 : spdk_nvme_timeout_cb timeout_cb_fn;
907 : void *timeout_cb_arg;
908 : /** separate timeout values for io vs. admin reqs */
909 : uint64_t timeout_io_ticks;
910 : uint64_t timeout_admin_ticks;
911 :
912 : /** List to publish AENs to all procs in multiprocess setup */
913 : STAILQ_HEAD(, spdk_nvme_ctrlr_aer_completion_list) async_events;
914 : };
915 :
916 : struct nvme_register_completion {
917 : struct spdk_nvme_cpl cpl;
918 : uint64_t value;
919 : spdk_nvme_reg_cb cb_fn;
920 : void *cb_ctx;
921 : STAILQ_ENTRY(nvme_register_completion) stailq;
922 : pid_t pid;
923 : };
924 :
925 : struct spdk_nvme_ctrlr {
926 : /* Hot data (accessed in I/O path) starts here. */
927 :
928 : /* Tree of namespaces */
929 : RB_HEAD(nvme_ns_tree, spdk_nvme_ns) ns;
930 :
931 : /* The number of active namespaces */
932 : uint32_t active_ns_count;
933 :
934 : bool is_removed;
935 :
936 : bool is_resetting;
937 :
938 : bool is_failed;
939 :
940 : bool is_destructed;
941 :
942 : bool timeout_enabled;
943 :
944 : /* The application is preparing to reset the controller. Transports
945 : * can use this to skip unnecessary parts of the qpair deletion process
946 : * for example, like the DELETE_SQ/CQ commands.
947 : */
948 : bool prepare_for_reset;
949 :
950 : bool is_disconnecting;
951 :
952 : bool needs_io_msg_update;
953 :
954 : uint16_t max_sges;
955 :
956 : uint16_t cntlid;
957 :
958 : /** Controller support flags */
959 : uint64_t flags;
960 :
961 : /** NVMEoF in-capsule data size in bytes */
962 : uint32_t ioccsz_bytes;
963 :
964 : /** NVMEoF in-capsule data offset in 16 byte units */
965 : uint16_t icdoff;
966 :
967 : /* Cold data (not accessed in normal I/O path) is after this point. */
968 :
969 : struct spdk_nvme_transport_id trid;
970 :
971 : union spdk_nvme_cap_register cap;
972 : union spdk_nvme_vs_register vs;
973 :
974 : int state;
975 : uint64_t state_timeout_tsc;
976 :
977 : uint64_t next_keep_alive_tick;
978 : uint64_t keep_alive_interval_ticks;
979 :
980 : TAILQ_ENTRY(spdk_nvme_ctrlr) tailq;
981 :
982 : /** All the log pages supported */
983 : bool log_page_supported[256];
984 :
985 : /** All the features supported */
986 : bool feature_supported[256];
987 :
988 : /** maximum i/o size in bytes */
989 : uint32_t max_xfer_size;
990 :
991 : /** minimum page size supported by this controller in bytes */
992 : uint32_t min_page_size;
993 :
994 : /** selected memory page size for this controller in bytes */
995 : uint32_t page_size;
996 :
997 : uint32_t num_aers;
998 : struct nvme_async_event_request aer[NVME_MAX_ASYNC_EVENTS];
999 :
1000 : /** guards access to the controller itself, including admin queues */
1001 : pthread_mutex_t ctrlr_lock;
1002 :
1003 : struct spdk_nvme_qpair *adminq;
1004 :
1005 : /** shadow doorbell buffer */
1006 : uint32_t *shadow_doorbell;
1007 : /** eventidx buffer */
1008 : uint32_t *eventidx;
1009 :
1010 : /**
1011 : * Identify Controller data.
1012 : */
1013 : struct spdk_nvme_ctrlr_data cdata;
1014 :
1015 : /**
1016 : * Zoned Namespace Command Set Specific Identify Controller data.
1017 : */
1018 : struct spdk_nvme_zns_ctrlr_data *cdata_zns;
1019 :
1020 : struct spdk_bit_array *free_io_qids;
1021 : TAILQ_HEAD(, spdk_nvme_qpair) active_io_qpairs;
1022 :
1023 : struct spdk_nvme_ctrlr_opts opts;
1024 :
1025 : uint64_t quirks;
1026 :
1027 : /* Extra sleep time during controller initialization */
1028 : uint64_t sleep_timeout_tsc;
1029 :
1030 : /** Track all the processes manage this controller */
1031 : TAILQ_HEAD(, spdk_nvme_ctrlr_process) active_procs;
1032 :
1033 :
1034 : STAILQ_HEAD(, nvme_request) queued_aborts;
1035 : uint32_t outstanding_aborts;
1036 :
1037 : uint32_t lock_depth;
1038 :
1039 : /* CB to notify the user when the ctrlr is removed/failed. */
1040 : spdk_nvme_remove_cb remove_cb;
1041 : void *cb_ctx;
1042 :
1043 : struct spdk_nvme_qpair *external_io_msgs_qpair;
1044 : pthread_mutex_t external_io_msgs_lock;
1045 : struct spdk_ring *external_io_msgs;
1046 :
1047 : STAILQ_HEAD(, nvme_io_msg_producer) io_producers;
1048 :
1049 : struct spdk_nvme_ana_page *ana_log_page;
1050 : struct spdk_nvme_ana_group_descriptor *copied_ana_desc;
1051 : uint32_t ana_log_page_size;
1052 :
1053 : /* scratchpad pointer that can be used to send data between two NVME_CTRLR_STATEs */
1054 : void *tmp_ptr;
1055 :
1056 : /* maximum zone append size in bytes */
1057 : uint32_t max_zone_append_size;
1058 :
1059 : /* PMR size in bytes */
1060 : uint64_t pmr_size;
1061 :
1062 : /* Boot Partition Info */
1063 : enum nvme_bp_write_state bp_ws;
1064 : uint32_t bpid;
1065 : spdk_nvme_cmd_cb bp_write_cb_fn;
1066 : void *bp_write_cb_arg;
1067 :
1068 : /* Firmware Download */
1069 : void *fw_payload;
1070 : unsigned int fw_size_remaining;
1071 : unsigned int fw_offset;
1072 : unsigned int fw_transfer_size;
1073 :
1074 : /* Completed register operations */
1075 : STAILQ_HEAD(, nvme_register_completion) register_operations;
1076 :
1077 : union spdk_nvme_cc_register process_init_cc;
1078 :
1079 : /* Authentication transaction ID */
1080 : uint16_t auth_tid;
1081 : /* Authentication sequence number */
1082 : uint32_t auth_seqnum;
1083 : };
1084 :
1085 : struct spdk_nvme_probe_ctx {
1086 : struct spdk_nvme_transport_id trid;
1087 : void *cb_ctx;
1088 : spdk_nvme_probe_cb probe_cb;
1089 : spdk_nvme_attach_cb attach_cb;
1090 : spdk_nvme_remove_cb remove_cb;
1091 : TAILQ_HEAD(, spdk_nvme_ctrlr) init_ctrlrs;
1092 : };
1093 :
1094 : typedef void (*nvme_ctrlr_detach_cb)(struct spdk_nvme_ctrlr *ctrlr);
1095 :
1096 : enum nvme_ctrlr_detach_state {
1097 : NVME_CTRLR_DETACH_SET_CC,
1098 : NVME_CTRLR_DETACH_CHECK_CSTS,
1099 : NVME_CTRLR_DETACH_GET_CSTS,
1100 : NVME_CTRLR_DETACH_GET_CSTS_DONE,
1101 : };
1102 :
1103 : struct nvme_ctrlr_detach_ctx {
1104 : struct spdk_nvme_ctrlr *ctrlr;
1105 : nvme_ctrlr_detach_cb cb_fn;
1106 : uint64_t shutdown_start_tsc;
1107 : uint32_t shutdown_timeout_ms;
1108 : bool shutdown_complete;
1109 : enum nvme_ctrlr_detach_state state;
1110 : union spdk_nvme_csts_register csts;
1111 : TAILQ_ENTRY(nvme_ctrlr_detach_ctx) link;
1112 : };
1113 :
1114 : struct spdk_nvme_detach_ctx {
1115 : TAILQ_HEAD(, nvme_ctrlr_detach_ctx) head;
1116 : };
1117 :
1118 : struct nvme_driver {
1119 : pthread_mutex_t lock;
1120 :
1121 : /** Multi-process shared attached controller list */
1122 : TAILQ_HEAD(, spdk_nvme_ctrlr) shared_attached_ctrlrs;
1123 :
1124 : bool initialized;
1125 : struct spdk_uuid default_extended_host_id;
1126 :
1127 : /** netlink socket fd for hotplug messages */
1128 : int hotplug_fd;
1129 : };
1130 :
1131 : #define nvme_ns_cmd_get_ext_io_opt(opts, field, defval) \
1132 : ((opts) != NULL && offsetof(struct spdk_nvme_ns_cmd_ext_io_opts, field) + \
1133 : sizeof((opts)->field) <= (opts)->size ? (opts)->field : (defval))
1134 :
1135 : extern struct nvme_driver *g_spdk_nvme_driver;
1136 :
1137 : int nvme_driver_init(void);
1138 :
1139 : #define nvme_delay usleep
1140 :
1141 : static inline bool
1142 70 : nvme_qpair_is_admin_queue(struct spdk_nvme_qpair *qpair)
1143 : {
1144 70 : return qpair->id == 0;
1145 : }
1146 :
1147 : static inline bool
1148 : nvme_qpair_is_io_queue(struct spdk_nvme_qpair *qpair)
1149 : {
1150 : return qpair->id != 0;
1151 : }
1152 :
1153 : static inline int
1154 12677 : nvme_robust_mutex_lock(pthread_mutex_t *mtx)
1155 : {
1156 12677 : int rc = pthread_mutex_lock(mtx);
1157 :
1158 : #ifndef __FreeBSD__
1159 12677 : if (rc == EOWNERDEAD) {
1160 0 : rc = pthread_mutex_consistent(mtx);
1161 : }
1162 : #endif
1163 :
1164 12677 : return rc;
1165 : }
1166 :
1167 : static inline int
1168 12609 : nvme_ctrlr_lock(struct spdk_nvme_ctrlr *ctrlr)
1169 : {
1170 : int rc;
1171 :
1172 12609 : rc = nvme_robust_mutex_lock(&ctrlr->ctrlr_lock);
1173 12609 : ctrlr->lock_depth++;
1174 12609 : return rc;
1175 : }
1176 :
1177 : static inline int
1178 12675 : nvme_robust_mutex_unlock(pthread_mutex_t *mtx)
1179 : {
1180 12675 : return pthread_mutex_unlock(mtx);
1181 : }
1182 :
1183 : static inline int
1184 12607 : nvme_ctrlr_unlock(struct spdk_nvme_ctrlr *ctrlr)
1185 : {
1186 12607 : ctrlr->lock_depth--;
1187 12607 : return nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock);
1188 : }
1189 :
1190 : /* Poll group management functions. */
1191 : int nvme_poll_group_connect_qpair(struct spdk_nvme_qpair *qpair);
1192 : int nvme_poll_group_disconnect_qpair(struct spdk_nvme_qpair *qpair);
1193 :
1194 : /* Admin functions */
1195 : int nvme_ctrlr_cmd_identify(struct spdk_nvme_ctrlr *ctrlr,
1196 : uint8_t cns, uint16_t cntid, uint32_t nsid,
1197 : uint8_t csi, void *payload, size_t payload_size,
1198 : spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1199 : int nvme_ctrlr_cmd_set_num_queues(struct spdk_nvme_ctrlr *ctrlr,
1200 : uint32_t num_queues, spdk_nvme_cmd_cb cb_fn,
1201 : void *cb_arg);
1202 : int nvme_ctrlr_cmd_get_num_queues(struct spdk_nvme_ctrlr *ctrlr,
1203 : spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1204 : int nvme_ctrlr_cmd_set_async_event_config(struct spdk_nvme_ctrlr *ctrlr,
1205 : union spdk_nvme_feat_async_event_configuration config,
1206 : spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1207 : int nvme_ctrlr_cmd_set_host_id(struct spdk_nvme_ctrlr *ctrlr, void *host_id, uint32_t host_id_size,
1208 : spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1209 : int nvme_ctrlr_cmd_attach_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid,
1210 : struct spdk_nvme_ctrlr_list *payload, spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1211 : int nvme_ctrlr_cmd_detach_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid,
1212 : struct spdk_nvme_ctrlr_list *payload, spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1213 : int nvme_ctrlr_cmd_create_ns(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_ns_data *payload,
1214 : spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1215 : int nvme_ctrlr_cmd_doorbell_buffer_config(struct spdk_nvme_ctrlr *ctrlr,
1216 : uint64_t prp1, uint64_t prp2,
1217 : spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1218 : int nvme_ctrlr_cmd_delete_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid, spdk_nvme_cmd_cb cb_fn,
1219 : void *cb_arg);
1220 : int nvme_ctrlr_cmd_format(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid,
1221 : struct spdk_nvme_format *format, spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1222 : int nvme_ctrlr_cmd_fw_commit(struct spdk_nvme_ctrlr *ctrlr,
1223 : const struct spdk_nvme_fw_commit *fw_commit,
1224 : spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1225 : int nvme_ctrlr_cmd_fw_image_download(struct spdk_nvme_ctrlr *ctrlr,
1226 : uint32_t size, uint32_t offset, void *payload,
1227 : spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1228 : int nvme_ctrlr_cmd_sanitize(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid,
1229 : struct spdk_nvme_sanitize *sanitize, uint32_t cdw11,
1230 : spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1231 : void nvme_completion_poll_cb(void *arg, const struct spdk_nvme_cpl *cpl);
1232 : int nvme_wait_for_completion(struct spdk_nvme_qpair *qpair,
1233 : struct nvme_completion_poll_status *status);
1234 : int nvme_wait_for_completion_robust_lock(struct spdk_nvme_qpair *qpair,
1235 : struct nvme_completion_poll_status *status,
1236 : pthread_mutex_t *robust_mutex);
1237 : int nvme_wait_for_completion_timeout(struct spdk_nvme_qpair *qpair,
1238 : struct nvme_completion_poll_status *status,
1239 : uint64_t timeout_in_usecs);
1240 : int nvme_wait_for_completion_robust_lock_timeout(struct spdk_nvme_qpair *qpair,
1241 : struct nvme_completion_poll_status *status,
1242 : pthread_mutex_t *robust_mutex,
1243 : uint64_t timeout_in_usecs);
1244 : int nvme_wait_for_completion_robust_lock_timeout_poll(struct spdk_nvme_qpair *qpair,
1245 : struct nvme_completion_poll_status *status,
1246 : pthread_mutex_t *robust_mutex);
1247 :
1248 : struct spdk_nvme_ctrlr_process *nvme_ctrlr_get_process(struct spdk_nvme_ctrlr *ctrlr,
1249 : pid_t pid);
1250 : struct spdk_nvme_ctrlr_process *nvme_ctrlr_get_current_process(struct spdk_nvme_ctrlr *ctrlr);
1251 : int nvme_ctrlr_add_process(struct spdk_nvme_ctrlr *ctrlr, void *devhandle);
1252 : void nvme_ctrlr_free_processes(struct spdk_nvme_ctrlr *ctrlr);
1253 : struct spdk_pci_device *nvme_ctrlr_proc_get_devhandle(struct spdk_nvme_ctrlr *ctrlr);
1254 :
1255 : int nvme_ctrlr_probe(const struct spdk_nvme_transport_id *trid,
1256 : struct spdk_nvme_probe_ctx *probe_ctx, void *devhandle);
1257 :
1258 : int nvme_ctrlr_construct(struct spdk_nvme_ctrlr *ctrlr);
1259 : void nvme_ctrlr_destruct_finish(struct spdk_nvme_ctrlr *ctrlr);
1260 : void nvme_ctrlr_destruct(struct spdk_nvme_ctrlr *ctrlr);
1261 : void nvme_ctrlr_destruct_async(struct spdk_nvme_ctrlr *ctrlr,
1262 : struct nvme_ctrlr_detach_ctx *ctx);
1263 : int nvme_ctrlr_destruct_poll_async(struct spdk_nvme_ctrlr *ctrlr,
1264 : struct nvme_ctrlr_detach_ctx *ctx);
1265 : void nvme_ctrlr_fail(struct spdk_nvme_ctrlr *ctrlr, bool hot_remove);
1266 : int nvme_ctrlr_process_init(struct spdk_nvme_ctrlr *ctrlr);
1267 : void nvme_ctrlr_disable(struct spdk_nvme_ctrlr *ctrlr);
1268 : int nvme_ctrlr_disable_poll(struct spdk_nvme_ctrlr *ctrlr);
1269 : void nvme_ctrlr_connected(struct spdk_nvme_probe_ctx *probe_ctx,
1270 : struct spdk_nvme_ctrlr *ctrlr);
1271 :
1272 : int nvme_ctrlr_submit_admin_request(struct spdk_nvme_ctrlr *ctrlr,
1273 : struct nvme_request *req);
1274 : int nvme_ctrlr_get_cap(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_cap_register *cap);
1275 : int nvme_ctrlr_get_vs(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_vs_register *vs);
1276 : int nvme_ctrlr_get_cmbsz(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_cmbsz_register *cmbsz);
1277 : int nvme_ctrlr_get_pmrcap(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_pmrcap_register *pmrcap);
1278 : int nvme_ctrlr_get_bpinfo(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_bpinfo_register *bpinfo);
1279 : int nvme_ctrlr_set_bprsel(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_bprsel_register *bprsel);
1280 : int nvme_ctrlr_set_bpmbl(struct spdk_nvme_ctrlr *ctrlr, uint64_t bpmbl_value);
1281 : bool nvme_ctrlr_multi_iocs_enabled(struct spdk_nvme_ctrlr *ctrlr);
1282 : void nvme_ctrlr_disconnect_qpair(struct spdk_nvme_qpair *qpair);
1283 : void nvme_ctrlr_abort_queued_aborts(struct spdk_nvme_ctrlr *ctrlr);
1284 : int nvme_qpair_init(struct spdk_nvme_qpair *qpair, uint16_t id,
1285 : struct spdk_nvme_ctrlr *ctrlr,
1286 : enum spdk_nvme_qprio qprio,
1287 : uint32_t num_requests, bool async);
1288 : void nvme_qpair_deinit(struct spdk_nvme_qpair *qpair);
1289 : void nvme_qpair_complete_error_reqs(struct spdk_nvme_qpair *qpair);
1290 : int nvme_qpair_submit_request(struct spdk_nvme_qpair *qpair,
1291 : struct nvme_request *req);
1292 : void nvme_qpair_abort_all_queued_reqs(struct spdk_nvme_qpair *qpair);
1293 : uint32_t nvme_qpair_abort_queued_reqs_with_cbarg(struct spdk_nvme_qpair *qpair, void *cmd_cb_arg);
1294 : void nvme_qpair_abort_queued_reqs(struct spdk_nvme_qpair *qpair);
1295 : void nvme_qpair_resubmit_requests(struct spdk_nvme_qpair *qpair, uint32_t num_requests);
1296 : int nvme_ctrlr_identify_active_ns(struct spdk_nvme_ctrlr *ctrlr);
1297 : void nvme_ns_set_identify_data(struct spdk_nvme_ns *ns);
1298 : void nvme_ns_set_id_desc_list_data(struct spdk_nvme_ns *ns);
1299 : void nvme_ns_free_zns_specific_data(struct spdk_nvme_ns *ns);
1300 : void nvme_ns_free_iocs_specific_data(struct spdk_nvme_ns *ns);
1301 : bool nvme_ns_has_supported_iocs_specific_data(struct spdk_nvme_ns *ns);
1302 : int nvme_ns_construct(struct spdk_nvme_ns *ns, uint32_t id,
1303 : struct spdk_nvme_ctrlr *ctrlr);
1304 : void nvme_ns_destruct(struct spdk_nvme_ns *ns);
1305 : int nvme_ns_cmd_zone_append_with_md(struct spdk_nvme_ns *ns, struct spdk_nvme_qpair *qpair,
1306 : void *buffer, void *metadata, uint64_t zslba,
1307 : uint32_t lba_count, spdk_nvme_cmd_cb cb_fn, void *cb_arg,
1308 : uint32_t io_flags, uint16_t apptag_mask, uint16_t apptag);
1309 : int nvme_ns_cmd_zone_appendv_with_md(struct spdk_nvme_ns *ns, struct spdk_nvme_qpair *qpair,
1310 : uint64_t zslba, uint32_t lba_count,
1311 : spdk_nvme_cmd_cb cb_fn, void *cb_arg, uint32_t io_flags,
1312 : spdk_nvme_req_reset_sgl_cb reset_sgl_fn,
1313 : spdk_nvme_req_next_sge_cb next_sge_fn, void *metadata,
1314 : uint16_t apptag_mask, uint16_t apptag);
1315 :
1316 : int nvme_fabric_ctrlr_set_reg_4(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, uint32_t value);
1317 : int nvme_fabric_ctrlr_set_reg_8(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, uint64_t value);
1318 : int nvme_fabric_ctrlr_get_reg_4(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, uint32_t *value);
1319 : int nvme_fabric_ctrlr_get_reg_8(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, uint64_t *value);
1320 : int nvme_fabric_ctrlr_set_reg_4_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
1321 : uint32_t value, spdk_nvme_reg_cb cb_fn, void *cb_arg);
1322 : int nvme_fabric_ctrlr_set_reg_8_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
1323 : uint64_t value, spdk_nvme_reg_cb cb_fn, void *cb_arg);
1324 : int nvme_fabric_ctrlr_get_reg_4_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
1325 : spdk_nvme_reg_cb cb_fn, void *cb_arg);
1326 : int nvme_fabric_ctrlr_get_reg_8_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
1327 : spdk_nvme_reg_cb cb_fn, void *cb_arg);
1328 : int nvme_fabric_ctrlr_scan(struct spdk_nvme_probe_ctx *probe_ctx, bool direct_connect);
1329 : int nvme_fabric_ctrlr_discover(struct spdk_nvme_ctrlr *ctrlr,
1330 : struct spdk_nvme_probe_ctx *probe_ctx);
1331 : int nvme_fabric_qpair_connect(struct spdk_nvme_qpair *qpair, uint32_t num_entries);
1332 : int nvme_fabric_qpair_connect_async(struct spdk_nvme_qpair *qpair, uint32_t num_entries);
1333 : int nvme_fabric_qpair_connect_poll(struct spdk_nvme_qpair *qpair);
1334 : int nvme_fabric_qpair_authenticate_async(struct spdk_nvme_qpair *qpair);
1335 : int nvme_fabric_qpair_authenticate_poll(struct spdk_nvme_qpair *qpair);
1336 :
1337 : typedef int (*spdk_nvme_parse_ana_log_page_cb)(
1338 : const struct spdk_nvme_ana_group_descriptor *desc, void *cb_arg);
1339 : int nvme_ctrlr_parse_ana_log_page(struct spdk_nvme_ctrlr *ctrlr,
1340 : spdk_nvme_parse_ana_log_page_cb cb_fn, void *cb_arg);
1341 :
1342 : static inline void
1343 218 : nvme_request_clear(struct nvme_request *req)
1344 : {
1345 : /*
1346 : * Only memset/zero fields that need it. All other fields
1347 : * will be initialized appropriately either later in this
1348 : * function, or before they are needed later in the
1349 : * submission patch. For example, the children
1350 : * TAILQ_ENTRY and following members are
1351 : * only used as part of I/O splitting so we avoid
1352 : * memsetting them until it is actually needed.
1353 : * They will be initialized in nvme_request_add_child()
1354 : * if the request is split.
1355 : */
1356 218 : memset(req, 0, offsetof(struct nvme_request, payload_size));
1357 218 : }
1358 :
1359 : #define NVME_INIT_REQUEST(req, _cb_fn, _cb_arg, _payload, _payload_size, _md_size) \
1360 : do { \
1361 : nvme_request_clear(req); \
1362 : req->cb_fn = _cb_fn; \
1363 : req->cb_arg = _cb_arg; \
1364 : req->payload = _payload; \
1365 : req->payload_size = _payload_size; \
1366 : req->md_size = _md_size; \
1367 : req->pid = g_spdk_nvme_pid; \
1368 : req->submit_tick = 0; \
1369 : req->accel_sequence = NULL; \
1370 : } while (0);
1371 :
1372 : static inline struct nvme_request *
1373 229 : nvme_allocate_request(struct spdk_nvme_qpair *qpair,
1374 : const struct nvme_payload *payload, uint32_t payload_size, uint32_t md_size,
1375 : spdk_nvme_cmd_cb cb_fn, void *cb_arg)
1376 : {
1377 : struct nvme_request *req;
1378 :
1379 229 : req = STAILQ_FIRST(&qpair->free_req);
1380 229 : if (req == NULL) {
1381 14 : return req;
1382 : }
1383 :
1384 215 : STAILQ_REMOVE_HEAD(&qpair->free_req, stailq);
1385 215 : qpair->num_outstanding_reqs++;
1386 :
1387 215 : NVME_INIT_REQUEST(req, cb_fn, cb_arg, *payload, payload_size, md_size);
1388 :
1389 215 : return req;
1390 : }
1391 :
1392 : static inline struct nvme_request *
1393 118 : nvme_allocate_request_contig(struct spdk_nvme_qpair *qpair,
1394 : void *buffer, uint32_t payload_size,
1395 : spdk_nvme_cmd_cb cb_fn, void *cb_arg)
1396 : {
1397 118 : struct nvme_payload payload;
1398 :
1399 118 : payload = NVME_PAYLOAD_CONTIG(buffer, NULL);
1400 :
1401 118 : return nvme_allocate_request(qpair, &payload, payload_size, 0, cb_fn, cb_arg);
1402 : }
1403 :
1404 : static inline struct nvme_request *
1405 76 : nvme_allocate_request_null(struct spdk_nvme_qpair *qpair, spdk_nvme_cmd_cb cb_fn, void *cb_arg)
1406 : {
1407 76 : return nvme_allocate_request_contig(qpair, NULL, 0, cb_fn, cb_arg);
1408 : }
1409 :
1410 : struct nvme_request *nvme_allocate_request_user_copy(struct spdk_nvme_qpair *qpair,
1411 : void *buffer, uint32_t payload_size,
1412 : spdk_nvme_cmd_cb cb_fn, void *cb_arg, bool host_to_controller);
1413 :
1414 : static inline void
1415 156 : _nvme_free_request(struct nvme_request *req, struct spdk_nvme_qpair *qpair)
1416 : {
1417 156 : assert(req != NULL);
1418 156 : assert(req->num_children == 0);
1419 156 : assert(qpair != NULL);
1420 :
1421 : /* The reserved_req does not go in the free_req STAILQ - it is
1422 : * saved only for use with a FABRICS/CONNECT command.
1423 : */
1424 156 : if (spdk_likely(qpair->reserved_req != req)) {
1425 156 : STAILQ_INSERT_HEAD(&qpair->free_req, req, stailq);
1426 :
1427 156 : assert(qpair->num_outstanding_reqs > 0);
1428 156 : qpair->num_outstanding_reqs--;
1429 : }
1430 156 : }
1431 :
1432 : static inline void
1433 140 : nvme_free_request(struct nvme_request *req)
1434 : {
1435 140 : _nvme_free_request(req, req->qpair);
1436 140 : }
1437 :
1438 : static inline void
1439 16 : nvme_complete_request(spdk_nvme_cmd_cb cb_fn, void *cb_arg, struct spdk_nvme_qpair *qpair,
1440 : struct nvme_request *req, struct spdk_nvme_cpl *cpl)
1441 : {
1442 16 : struct spdk_nvme_cpl err_cpl;
1443 : struct nvme_error_cmd *cmd;
1444 :
1445 16 : if (spdk_unlikely(req->accel_sequence != NULL)) {
1446 0 : struct spdk_nvme_poll_group *pg = qpair->poll_group->group;
1447 :
1448 : /* Transports are required to execuete the sequence and clear req->accel_sequence.
1449 : * If it's left non-NULL it must mean the request is failed. */
1450 0 : assert(spdk_nvme_cpl_is_error(cpl));
1451 0 : pg->accel_fn_table.abort_sequence(req->accel_sequence);
1452 0 : req->accel_sequence = NULL;
1453 : }
1454 :
1455 : /* error injection at completion path,
1456 : * only inject for successful completed commands
1457 : */
1458 16 : if (spdk_unlikely(!TAILQ_EMPTY(&qpair->err_cmd_head) &&
1459 : !spdk_nvme_cpl_is_error(cpl))) {
1460 2 : TAILQ_FOREACH(cmd, &qpair->err_cmd_head, link) {
1461 :
1462 1 : if (cmd->do_not_submit) {
1463 0 : continue;
1464 : }
1465 :
1466 1 : if ((cmd->opc == req->cmd.opc) && cmd->err_count) {
1467 :
1468 0 : err_cpl = *cpl;
1469 0 : err_cpl.status.sct = cmd->status.sct;
1470 0 : err_cpl.status.sc = cmd->status.sc;
1471 :
1472 0 : cpl = &err_cpl;
1473 0 : cmd->err_count--;
1474 0 : break;
1475 : }
1476 : }
1477 : }
1478 :
1479 : /* For PCIe completions, we want to avoid touching the req itself to avoid
1480 : * dependencies on loading those cachelines. So call the internal helper
1481 : * function instead using the qpair that was passed by the caller, instead
1482 : * of getting it from the req.
1483 : */
1484 16 : _nvme_free_request(req, qpair);
1485 :
1486 16 : if (spdk_likely(cb_fn)) {
1487 15 : cb_fn(cb_arg, cpl);
1488 : }
1489 16 : }
1490 :
1491 : static inline void
1492 6 : nvme_cleanup_user_req(struct nvme_request *req)
1493 : {
1494 6 : if (req->user_buffer && req->payload_size) {
1495 2 : spdk_free(req->payload.contig_or_cb_arg);
1496 2 : req->user_buffer = NULL;
1497 : }
1498 :
1499 6 : req->user_cb_arg = NULL;
1500 6 : req->user_cb_fn = NULL;
1501 6 : }
1502 :
1503 : static inline void
1504 42 : nvme_qpair_set_state(struct spdk_nvme_qpair *qpair, enum nvme_qpair_state state)
1505 : {
1506 42 : qpair->state = state;
1507 42 : if (state == NVME_QPAIR_ENABLED) {
1508 24 : qpair->is_new_qpair = false;
1509 : }
1510 42 : }
1511 :
1512 : static inline enum nvme_qpair_state
1513 136 : nvme_qpair_get_state(struct spdk_nvme_qpair *qpair) {
1514 136 : return qpair->state;
1515 : }
1516 :
1517 : static inline void
1518 68 : nvme_request_remove_child(struct nvme_request *parent, struct nvme_request *child)
1519 : {
1520 68 : assert(parent != NULL);
1521 68 : assert(child != NULL);
1522 68 : assert(child->parent == parent);
1523 68 : assert(parent->num_children != 0);
1524 :
1525 68 : parent->num_children--;
1526 68 : child->parent = NULL;
1527 68 : TAILQ_REMOVE(&parent->children, child, child_tailq);
1528 68 : }
1529 :
1530 : static inline void
1531 0 : nvme_cb_complete_child(void *child_arg, const struct spdk_nvme_cpl *cpl)
1532 : {
1533 0 : struct nvme_request *child = child_arg;
1534 0 : struct nvme_request *parent = child->parent;
1535 :
1536 0 : nvme_request_remove_child(parent, child);
1537 :
1538 0 : if (spdk_nvme_cpl_is_error(cpl)) {
1539 0 : memcpy(&parent->parent_status, cpl, sizeof(*cpl));
1540 : }
1541 :
1542 0 : if (parent->num_children == 0) {
1543 0 : nvme_complete_request(parent->cb_fn, parent->cb_arg, parent->qpair,
1544 : parent, &parent->parent_status);
1545 : }
1546 0 : }
1547 :
1548 : static inline void
1549 55 : nvme_request_add_child(struct nvme_request *parent, struct nvme_request *child)
1550 : {
1551 55 : assert(parent->num_children != UINT16_MAX);
1552 :
1553 55 : if (parent->num_children == 0) {
1554 : /*
1555 : * Defer initialization of the children TAILQ since it falls
1556 : * on a separate cacheline. This ensures we do not touch this
1557 : * cacheline except on request splitting cases, which are
1558 : * relatively rare.
1559 : */
1560 14 : TAILQ_INIT(&parent->children);
1561 14 : parent->parent = NULL;
1562 14 : memset(&parent->parent_status, 0, sizeof(struct spdk_nvme_cpl));
1563 : }
1564 :
1565 55 : parent->num_children++;
1566 55 : TAILQ_INSERT_TAIL(&parent->children, child, child_tailq);
1567 55 : child->parent = parent;
1568 55 : child->cb_fn = nvme_cb_complete_child;
1569 55 : child->cb_arg = child;
1570 55 : }
1571 :
1572 : static inline void
1573 69 : nvme_request_free_children(struct nvme_request *req)
1574 : {
1575 : struct nvme_request *child, *tmp;
1576 :
1577 69 : if (req->num_children == 0) {
1578 57 : return;
1579 : }
1580 :
1581 : /* free all child nvme_request */
1582 62 : TAILQ_FOREACH_SAFE(child, &req->children, child_tailq, tmp) {
1583 50 : nvme_request_remove_child(req, child);
1584 50 : nvme_request_free_children(child);
1585 50 : nvme_free_request(child);
1586 : }
1587 : }
1588 :
1589 : int nvme_request_check_timeout(struct nvme_request *req, uint16_t cid,
1590 : struct spdk_nvme_ctrlr_process *active_proc, uint64_t now_tick);
1591 : uint64_t nvme_get_quirks(const struct spdk_pci_id *id);
1592 :
1593 : int nvme_robust_mutex_init_shared(pthread_mutex_t *mtx);
1594 : int nvme_robust_mutex_init_recursive_shared(pthread_mutex_t *mtx);
1595 :
1596 : bool nvme_completion_is_retry(const struct spdk_nvme_cpl *cpl);
1597 :
1598 : struct spdk_nvme_ctrlr *nvme_get_ctrlr_by_trid_unsafe(
1599 : const struct spdk_nvme_transport_id *trid);
1600 :
1601 : const struct spdk_nvme_transport *nvme_get_transport(const char *transport_name);
1602 : const struct spdk_nvme_transport *nvme_get_first_transport(void);
1603 : const struct spdk_nvme_transport *nvme_get_next_transport(const struct spdk_nvme_transport
1604 : *transport);
1605 : void nvme_ctrlr_update_namespaces(struct spdk_nvme_ctrlr *ctrlr);
1606 :
1607 : /* Transport specific functions */
1608 : struct spdk_nvme_ctrlr *nvme_transport_ctrlr_construct(const struct spdk_nvme_transport_id *trid,
1609 : const struct spdk_nvme_ctrlr_opts *opts,
1610 : void *devhandle);
1611 : int nvme_transport_ctrlr_destruct(struct spdk_nvme_ctrlr *ctrlr);
1612 : int nvme_transport_ctrlr_scan(struct spdk_nvme_probe_ctx *probe_ctx, bool direct_connect);
1613 : int nvme_transport_ctrlr_enable(struct spdk_nvme_ctrlr *ctrlr);
1614 : int nvme_transport_ctrlr_ready(struct spdk_nvme_ctrlr *ctrlr);
1615 : int nvme_transport_ctrlr_set_reg_4(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, uint32_t value);
1616 : int nvme_transport_ctrlr_set_reg_8(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, uint64_t value);
1617 : int nvme_transport_ctrlr_get_reg_4(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, uint32_t *value);
1618 : int nvme_transport_ctrlr_get_reg_8(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, uint64_t *value);
1619 : int nvme_transport_ctrlr_set_reg_4_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
1620 : uint32_t value, spdk_nvme_reg_cb cb_fn, void *cb_arg);
1621 : int nvme_transport_ctrlr_set_reg_8_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
1622 : uint64_t value, spdk_nvme_reg_cb cb_fn, void *cb_arg);
1623 : int nvme_transport_ctrlr_get_reg_4_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
1624 : spdk_nvme_reg_cb cb_fn, void *cb_arg);
1625 : int nvme_transport_ctrlr_get_reg_8_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
1626 : spdk_nvme_reg_cb cb_fn, void *cb_arg);
1627 : uint32_t nvme_transport_ctrlr_get_max_xfer_size(struct spdk_nvme_ctrlr *ctrlr);
1628 : uint16_t nvme_transport_ctrlr_get_max_sges(struct spdk_nvme_ctrlr *ctrlr);
1629 : struct spdk_nvme_qpair *nvme_transport_ctrlr_create_io_qpair(struct spdk_nvme_ctrlr *ctrlr,
1630 : uint16_t qid, const struct spdk_nvme_io_qpair_opts *opts);
1631 : int nvme_transport_ctrlr_reserve_cmb(struct spdk_nvme_ctrlr *ctrlr);
1632 : void *nvme_transport_ctrlr_map_cmb(struct spdk_nvme_ctrlr *ctrlr, size_t *size);
1633 : int nvme_transport_ctrlr_unmap_cmb(struct spdk_nvme_ctrlr *ctrlr);
1634 : int nvme_transport_ctrlr_enable_pmr(struct spdk_nvme_ctrlr *ctrlr);
1635 : int nvme_transport_ctrlr_disable_pmr(struct spdk_nvme_ctrlr *ctrlr);
1636 : void *nvme_transport_ctrlr_map_pmr(struct spdk_nvme_ctrlr *ctrlr, size_t *size);
1637 : int nvme_transport_ctrlr_unmap_pmr(struct spdk_nvme_ctrlr *ctrlr);
1638 : void nvme_transport_ctrlr_delete_io_qpair(struct spdk_nvme_ctrlr *ctrlr,
1639 : struct spdk_nvme_qpair *qpair);
1640 : int nvme_transport_ctrlr_connect_qpair(struct spdk_nvme_ctrlr *ctrlr,
1641 : struct spdk_nvme_qpair *qpair);
1642 : void nvme_transport_ctrlr_disconnect_qpair(struct spdk_nvme_ctrlr *ctrlr,
1643 : struct spdk_nvme_qpair *qpair);
1644 : void nvme_transport_ctrlr_disconnect_qpair_done(struct spdk_nvme_qpair *qpair);
1645 : int nvme_transport_ctrlr_get_memory_domains(const struct spdk_nvme_ctrlr *ctrlr,
1646 : struct spdk_memory_domain **domains, int array_size);
1647 : void nvme_transport_qpair_abort_reqs(struct spdk_nvme_qpair *qpair);
1648 : int nvme_transport_qpair_reset(struct spdk_nvme_qpair *qpair);
1649 : int nvme_transport_qpair_submit_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req);
1650 : int32_t nvme_transport_qpair_process_completions(struct spdk_nvme_qpair *qpair,
1651 : uint32_t max_completions);
1652 : void nvme_transport_admin_qpair_abort_aers(struct spdk_nvme_qpair *qpair);
1653 : int nvme_transport_qpair_iterate_requests(struct spdk_nvme_qpair *qpair,
1654 : int (*iter_fn)(struct nvme_request *req, void *arg),
1655 : void *arg);
1656 :
1657 : struct spdk_nvme_transport_poll_group *nvme_transport_poll_group_create(
1658 : const struct spdk_nvme_transport *transport);
1659 : struct spdk_nvme_transport_poll_group *nvme_transport_qpair_get_optimal_poll_group(
1660 : const struct spdk_nvme_transport *transport,
1661 : struct spdk_nvme_qpair *qpair);
1662 : int nvme_transport_poll_group_add(struct spdk_nvme_transport_poll_group *tgroup,
1663 : struct spdk_nvme_qpair *qpair);
1664 : int nvme_transport_poll_group_remove(struct spdk_nvme_transport_poll_group *tgroup,
1665 : struct spdk_nvme_qpair *qpair);
1666 : int nvme_transport_poll_group_disconnect_qpair(struct spdk_nvme_qpair *qpair);
1667 : int nvme_transport_poll_group_connect_qpair(struct spdk_nvme_qpair *qpair);
1668 : int64_t nvme_transport_poll_group_process_completions(struct spdk_nvme_transport_poll_group *tgroup,
1669 : uint32_t completions_per_qpair, spdk_nvme_disconnected_qpair_cb disconnected_qpair_cb);
1670 : int nvme_transport_poll_group_destroy(struct spdk_nvme_transport_poll_group *tgroup);
1671 : int nvme_transport_poll_group_get_stats(struct spdk_nvme_transport_poll_group *tgroup,
1672 : struct spdk_nvme_transport_poll_group_stat **stats);
1673 : void nvme_transport_poll_group_free_stats(struct spdk_nvme_transport_poll_group *tgroup,
1674 : struct spdk_nvme_transport_poll_group_stat *stats);
1675 : enum spdk_nvme_transport_type nvme_transport_get_trtype(const struct spdk_nvme_transport
1676 : *transport);
1677 : /*
1678 : * Below ref related functions must be called with the global
1679 : * driver lock held for the multi-process condition.
1680 : * Within these functions, the per ctrlr ctrlr_lock is also
1681 : * acquired for the multi-thread condition.
1682 : */
1683 : void nvme_ctrlr_proc_get_ref(struct spdk_nvme_ctrlr *ctrlr);
1684 : void nvme_ctrlr_proc_put_ref(struct spdk_nvme_ctrlr *ctrlr);
1685 : int nvme_ctrlr_get_ref_count(struct spdk_nvme_ctrlr *ctrlr);
1686 :
1687 : int nvme_ctrlr_reinitialize_io_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair);
1688 : int nvme_parse_addr(struct sockaddr_storage *sa, int family,
1689 : const char *addr, const char *service, long int *port);
1690 :
1691 : static inline bool
1692 5 : _is_page_aligned(uint64_t address, uint64_t page_size)
1693 : {
1694 5 : return (address & (page_size - 1)) == 0;
1695 : }
1696 :
1697 : #endif /* __NVME_INTERNAL_H__ */
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