Line data Source code
1 : /* SPDX-License-Identifier: BSD-3-Clause
2 : * Copyright (C) 2021 Intel Corporation. All rights reserved.
3 : * Copyright (c) 2021 Mellanox Technologies LTD. All rights reserved.
4 : * Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
5 : */
6 :
7 : /*
8 : * NVMe over PCIe common library
9 : */
10 :
11 : #include "spdk/stdinc.h"
12 : #include "spdk/likely.h"
13 : #include "spdk/string.h"
14 : #include "nvme_internal.h"
15 : #include "nvme_pcie_internal.h"
16 : #include "spdk/trace.h"
17 :
18 : #include "spdk_internal/trace_defs.h"
19 :
20 : __thread struct nvme_pcie_ctrlr *g_thread_mmio_ctrlr = NULL;
21 :
22 : static struct spdk_nvme_pcie_stat g_dummy_stat = {};
23 :
24 : static void nvme_pcie_fail_request_bad_vtophys(struct spdk_nvme_qpair *qpair,
25 : struct nvme_tracker *tr);
26 :
27 : static inline uint64_t
28 2093 : nvme_pcie_vtophys(struct spdk_nvme_ctrlr *ctrlr, const void *buf, uint64_t *size)
29 : {
30 2093 : if (spdk_likely(ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_PCIE)) {
31 2086 : return spdk_vtophys(buf, size);
32 : } else {
33 : /* vfio-user address translation with IOVA=VA mode */
34 7 : return (uint64_t)(uintptr_t)buf;
35 : }
36 : }
37 :
38 : int
39 6 : nvme_pcie_qpair_reset(struct spdk_nvme_qpair *qpair)
40 : {
41 6 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
42 : uint32_t i;
43 :
44 : /* all head/tail vals are set to 0 */
45 6 : pqpair->last_sq_tail = pqpair->sq_tail = pqpair->sq_head = pqpair->cq_head = 0;
46 :
47 : /*
48 : * First time through the completion queue, HW will set phase
49 : * bit on completions to 1. So set this to 1 here, indicating
50 : * we're looking for a 1 to know which entries have completed.
51 : * we'll toggle the bit each time when the completion queue
52 : * rolls over.
53 : */
54 6 : pqpair->flags.phase = 1;
55 46 : for (i = 0; i < pqpair->num_entries; i++) {
56 40 : pqpair->cpl[i].status.p = 0;
57 : }
58 :
59 6 : return 0;
60 : }
61 :
62 : static void
63 27 : nvme_qpair_construct_tracker(struct nvme_tracker *tr, uint16_t cid, uint64_t phys_addr)
64 : {
65 27 : tr->prp_sgl_bus_addr = phys_addr + offsetof(struct nvme_tracker, u.prp);
66 27 : tr->cid = cid;
67 27 : tr->req = NULL;
68 27 : }
69 :
70 : static void *
71 4 : nvme_pcie_ctrlr_alloc_cmb(struct spdk_nvme_ctrlr *ctrlr, uint64_t size, uint64_t alignment,
72 : uint64_t *phys_addr)
73 : {
74 4 : struct nvme_pcie_ctrlr *pctrlr = nvme_pcie_ctrlr(ctrlr);
75 : uintptr_t addr;
76 :
77 4 : if (pctrlr->cmb.mem_register_addr != NULL) {
78 : /* BAR is mapped for data */
79 1 : return NULL;
80 : }
81 :
82 3 : addr = (uintptr_t)pctrlr->cmb.bar_va + pctrlr->cmb.current_offset;
83 3 : addr = (addr + (alignment - 1)) & ~(alignment - 1);
84 :
85 : /* CMB may only consume part of the BAR, calculate accordingly */
86 3 : if (addr + size > ((uintptr_t)pctrlr->cmb.bar_va + pctrlr->cmb.size)) {
87 1 : SPDK_ERRLOG("Tried to allocate past valid CMB range!\n");
88 1 : return NULL;
89 : }
90 2 : *phys_addr = pctrlr->cmb.bar_pa + addr - (uintptr_t)pctrlr->cmb.bar_va;
91 :
92 2 : pctrlr->cmb.current_offset = (addr + size) - (uintptr_t)pctrlr->cmb.bar_va;
93 :
94 2 : return (void *)addr;
95 : }
96 :
97 : int
98 4 : nvme_pcie_qpair_construct(struct spdk_nvme_qpair *qpair,
99 : const struct spdk_nvme_io_qpair_opts *opts)
100 : {
101 4 : struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
102 4 : struct nvme_pcie_ctrlr *pctrlr = nvme_pcie_ctrlr(ctrlr);
103 4 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
104 : struct nvme_tracker *tr;
105 : uint16_t i;
106 : uint16_t num_trackers;
107 4 : size_t page_align = sysconf(_SC_PAGESIZE);
108 : size_t queue_align, queue_len;
109 4 : uint32_t flags = SPDK_MALLOC_DMA;
110 4 : uint64_t sq_paddr = 0;
111 4 : uint64_t cq_paddr = 0;
112 :
113 4 : if (opts) {
114 2 : pqpair->sq_vaddr = opts->sq.vaddr;
115 2 : pqpair->cq_vaddr = opts->cq.vaddr;
116 2 : sq_paddr = opts->sq.paddr;
117 2 : cq_paddr = opts->cq.paddr;
118 : }
119 :
120 4 : pqpair->retry_count = ctrlr->opts.transport_retry_count;
121 :
122 : /*
123 : * Limit the maximum number of completions to return per call to prevent wraparound,
124 : * and calculate how many trackers can be submitted at once without overflowing the
125 : * completion queue.
126 : */
127 4 : pqpair->max_completions_cap = pqpair->num_entries / 4;
128 4 : pqpair->max_completions_cap = spdk_max(pqpair->max_completions_cap, NVME_MIN_COMPLETIONS);
129 4 : pqpair->max_completions_cap = spdk_min(pqpair->max_completions_cap, NVME_MAX_COMPLETIONS);
130 4 : num_trackers = pqpair->num_entries - pqpair->max_completions_cap;
131 :
132 4 : SPDK_INFOLOG(nvme, "max_completions_cap = %" PRIu16 " num_trackers = %" PRIu16 "\n",
133 : pqpair->max_completions_cap, num_trackers);
134 :
135 4 : assert(num_trackers != 0);
136 :
137 4 : pqpair->sq_in_cmb = false;
138 :
139 4 : if (nvme_qpair_is_admin_queue(&pqpair->qpair)) {
140 1 : flags |= SPDK_MALLOC_SHARE;
141 : }
142 :
143 : /* cmd and cpl rings must be aligned on page size boundaries. */
144 4 : if (ctrlr->opts.use_cmb_sqs) {
145 1 : pqpair->cmd = nvme_pcie_ctrlr_alloc_cmb(ctrlr, pqpair->num_entries * sizeof(struct spdk_nvme_cmd),
146 : page_align, &pqpair->cmd_bus_addr);
147 1 : if (pqpair->cmd != NULL) {
148 1 : pqpair->sq_in_cmb = true;
149 : }
150 : }
151 :
152 4 : if (pqpair->sq_in_cmb == false) {
153 3 : if (pqpair->sq_vaddr) {
154 1 : pqpair->cmd = pqpair->sq_vaddr;
155 : } else {
156 : /* To ensure physical address contiguity we make each ring occupy
157 : * a single hugepage only. See MAX_IO_QUEUE_ENTRIES.
158 : */
159 2 : queue_len = pqpair->num_entries * sizeof(struct spdk_nvme_cmd);
160 2 : queue_align = spdk_max(spdk_align32pow2(queue_len), page_align);
161 2 : pqpair->cmd = spdk_zmalloc(queue_len, queue_align, NULL, SPDK_ENV_SOCKET_ID_ANY, flags);
162 2 : if (pqpair->cmd == NULL) {
163 0 : SPDK_ERRLOG("alloc qpair_cmd failed\n");
164 0 : return -ENOMEM;
165 : }
166 : }
167 3 : if (sq_paddr) {
168 1 : assert(pqpair->sq_vaddr != NULL);
169 1 : pqpair->cmd_bus_addr = sq_paddr;
170 : } else {
171 2 : pqpair->cmd_bus_addr = nvme_pcie_vtophys(ctrlr, pqpair->cmd, NULL);
172 2 : if (pqpair->cmd_bus_addr == SPDK_VTOPHYS_ERROR) {
173 0 : SPDK_ERRLOG("spdk_vtophys(pqpair->cmd) failed\n");
174 0 : return -EFAULT;
175 : }
176 : }
177 : }
178 :
179 4 : if (pqpair->cq_vaddr) {
180 2 : pqpair->cpl = pqpair->cq_vaddr;
181 : } else {
182 2 : queue_len = pqpair->num_entries * sizeof(struct spdk_nvme_cpl);
183 2 : queue_align = spdk_max(spdk_align32pow2(queue_len), page_align);
184 2 : pqpair->cpl = spdk_zmalloc(queue_len, queue_align, NULL, SPDK_ENV_SOCKET_ID_ANY, flags);
185 2 : if (pqpair->cpl == NULL) {
186 0 : SPDK_ERRLOG("alloc qpair_cpl failed\n");
187 0 : return -ENOMEM;
188 : }
189 : }
190 4 : if (cq_paddr) {
191 2 : assert(pqpair->cq_vaddr != NULL);
192 2 : pqpair->cpl_bus_addr = cq_paddr;
193 : } else {
194 2 : pqpair->cpl_bus_addr = nvme_pcie_vtophys(ctrlr, pqpair->cpl, NULL);
195 2 : if (pqpair->cpl_bus_addr == SPDK_VTOPHYS_ERROR) {
196 0 : SPDK_ERRLOG("spdk_vtophys(pqpair->cpl) failed\n");
197 0 : return -EFAULT;
198 : }
199 : }
200 :
201 4 : pqpair->sq_tdbl = pctrlr->doorbell_base + (2 * qpair->id + 0) * pctrlr->doorbell_stride_u32;
202 4 : pqpair->cq_hdbl = pctrlr->doorbell_base + (2 * qpair->id + 1) * pctrlr->doorbell_stride_u32;
203 :
204 : /*
205 : * Reserve space for all of the trackers in a single allocation.
206 : * struct nvme_tracker must be padded so that its size is already a power of 2.
207 : * This ensures the PRP list embedded in the nvme_tracker object will not span a
208 : * 4KB boundary, while allowing access to trackers in tr[] via normal array indexing.
209 : */
210 4 : pqpair->tr = spdk_zmalloc(num_trackers * sizeof(*tr), sizeof(*tr), NULL,
211 : SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE);
212 4 : if (pqpair->tr == NULL) {
213 0 : SPDK_ERRLOG("nvme_tr failed\n");
214 0 : return -ENOMEM;
215 : }
216 :
217 4 : TAILQ_INIT(&pqpair->free_tr);
218 4 : TAILQ_INIT(&pqpair->outstanding_tr);
219 :
220 31 : for (i = 0; i < num_trackers; i++) {
221 27 : tr = &pqpair->tr[i];
222 27 : nvme_qpair_construct_tracker(tr, i, nvme_pcie_vtophys(ctrlr, tr, NULL));
223 27 : TAILQ_INSERT_HEAD(&pqpair->free_tr, tr, tq_list);
224 : }
225 :
226 4 : nvme_pcie_qpair_reset(qpair);
227 :
228 4 : return 0;
229 : }
230 :
231 : int
232 1 : nvme_pcie_ctrlr_construct_admin_qpair(struct spdk_nvme_ctrlr *ctrlr, uint16_t num_entries)
233 : {
234 : struct nvme_pcie_qpair *pqpair;
235 : int rc;
236 :
237 1 : pqpair = spdk_zmalloc(sizeof(*pqpair), 64, NULL, SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE);
238 1 : if (pqpair == NULL) {
239 0 : return -ENOMEM;
240 : }
241 :
242 1 : pqpair->num_entries = num_entries;
243 1 : pqpair->flags.delay_cmd_submit = 0;
244 1 : pqpair->pcie_state = NVME_PCIE_QPAIR_READY;
245 :
246 1 : ctrlr->adminq = &pqpair->qpair;
247 :
248 1 : rc = nvme_qpair_init(ctrlr->adminq,
249 : 0, /* qpair ID */
250 : ctrlr,
251 : SPDK_NVME_QPRIO_URGENT,
252 : num_entries,
253 : false);
254 1 : if (rc != 0) {
255 0 : return rc;
256 : }
257 :
258 1 : pqpair->stat = spdk_zmalloc(sizeof(*pqpair->stat), 64, NULL, SPDK_ENV_SOCKET_ID_ANY,
259 : SPDK_MALLOC_SHARE);
260 1 : if (!pqpair->stat) {
261 0 : SPDK_ERRLOG("Failed to allocate admin qpair statistics\n");
262 0 : return -ENOMEM;
263 : }
264 :
265 1 : return nvme_pcie_qpair_construct(ctrlr->adminq, NULL);
266 : }
267 :
268 : /**
269 : * Note: the ctrlr_lock must be held when calling this function.
270 : */
271 : void
272 0 : nvme_pcie_qpair_insert_pending_admin_request(struct spdk_nvme_qpair *qpair,
273 : struct nvme_request *req, struct spdk_nvme_cpl *cpl)
274 : {
275 0 : struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
276 0 : struct nvme_request *active_req = req;
277 : struct spdk_nvme_ctrlr_process *active_proc;
278 :
279 : /*
280 : * The admin request is from another process. Move to the per
281 : * process list for that process to handle it later.
282 : */
283 0 : assert(nvme_qpair_is_admin_queue(qpair));
284 0 : assert(active_req->pid != getpid());
285 :
286 0 : active_proc = nvme_ctrlr_get_process(ctrlr, active_req->pid);
287 0 : if (active_proc) {
288 : /* Save the original completion information */
289 0 : memcpy(&active_req->cpl, cpl, sizeof(*cpl));
290 0 : STAILQ_INSERT_TAIL(&active_proc->active_reqs, active_req, stailq);
291 : } else {
292 0 : SPDK_ERRLOG("The owning process (pid %d) is not found. Dropping the request.\n",
293 : active_req->pid);
294 0 : nvme_cleanup_user_req(active_req);
295 0 : nvme_free_request(active_req);
296 : }
297 0 : }
298 :
299 : /**
300 : * Note: the ctrlr_lock must be held when calling this function.
301 : */
302 : void
303 0 : nvme_pcie_qpair_complete_pending_admin_request(struct spdk_nvme_qpair *qpair)
304 : {
305 0 : struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
306 : struct nvme_request *req, *tmp_req;
307 0 : pid_t pid = getpid();
308 : struct spdk_nvme_ctrlr_process *proc;
309 :
310 : /*
311 : * Check whether there is any pending admin request from
312 : * other active processes.
313 : */
314 0 : assert(nvme_qpair_is_admin_queue(qpair));
315 :
316 0 : proc = nvme_ctrlr_get_current_process(ctrlr);
317 0 : if (!proc) {
318 0 : SPDK_ERRLOG("the active process (pid %d) is not found for this controller.\n", pid);
319 0 : assert(proc);
320 0 : return;
321 : }
322 :
323 0 : STAILQ_FOREACH_SAFE(req, &proc->active_reqs, stailq, tmp_req) {
324 0 : STAILQ_REMOVE(&proc->active_reqs, req, nvme_request, stailq);
325 :
326 0 : assert(req->pid == pid);
327 :
328 0 : nvme_complete_request(req->cb_fn, req->cb_arg, qpair, req, &req->cpl);
329 : }
330 : }
331 :
332 : int
333 7 : nvme_pcie_ctrlr_cmd_create_io_cq(struct spdk_nvme_ctrlr *ctrlr,
334 : struct spdk_nvme_qpair *io_que, spdk_nvme_cmd_cb cb_fn,
335 : void *cb_arg)
336 : {
337 7 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(io_que);
338 : struct nvme_request *req;
339 : struct spdk_nvme_cmd *cmd;
340 :
341 7 : req = nvme_allocate_request_null(ctrlr->adminq, cb_fn, cb_arg);
342 7 : if (req == NULL) {
343 2 : return -ENOMEM;
344 : }
345 :
346 5 : cmd = &req->cmd;
347 5 : cmd->opc = SPDK_NVME_OPC_CREATE_IO_CQ;
348 :
349 5 : cmd->cdw10_bits.create_io_q.qid = io_que->id;
350 5 : cmd->cdw10_bits.create_io_q.qsize = pqpair->num_entries - 1;
351 :
352 5 : cmd->cdw11_bits.create_io_cq.pc = 1;
353 5 : cmd->dptr.prp.prp1 = pqpair->cpl_bus_addr;
354 :
355 5 : return nvme_ctrlr_submit_admin_request(ctrlr, req);
356 : }
357 :
358 : int
359 5 : nvme_pcie_ctrlr_cmd_create_io_sq(struct spdk_nvme_ctrlr *ctrlr,
360 : struct spdk_nvme_qpair *io_que, spdk_nvme_cmd_cb cb_fn, void *cb_arg)
361 : {
362 5 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(io_que);
363 : struct nvme_request *req;
364 : struct spdk_nvme_cmd *cmd;
365 :
366 5 : req = nvme_allocate_request_null(ctrlr->adminq, cb_fn, cb_arg);
367 5 : if (req == NULL) {
368 1 : return -ENOMEM;
369 : }
370 :
371 4 : cmd = &req->cmd;
372 4 : cmd->opc = SPDK_NVME_OPC_CREATE_IO_SQ;
373 :
374 4 : cmd->cdw10_bits.create_io_q.qid = io_que->id;
375 4 : cmd->cdw10_bits.create_io_q.qsize = pqpair->num_entries - 1;
376 4 : cmd->cdw11_bits.create_io_sq.pc = 1;
377 4 : cmd->cdw11_bits.create_io_sq.qprio = io_que->qprio;
378 4 : cmd->cdw11_bits.create_io_sq.cqid = io_que->id;
379 4 : cmd->dptr.prp.prp1 = pqpair->cmd_bus_addr;
380 :
381 4 : return nvme_ctrlr_submit_admin_request(ctrlr, req);
382 : }
383 :
384 : int
385 3 : nvme_pcie_ctrlr_cmd_delete_io_cq(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair,
386 : spdk_nvme_cmd_cb cb_fn, void *cb_arg)
387 : {
388 : struct nvme_request *req;
389 : struct spdk_nvme_cmd *cmd;
390 :
391 3 : req = nvme_allocate_request_null(ctrlr->adminq, cb_fn, cb_arg);
392 3 : if (req == NULL) {
393 1 : return -ENOMEM;
394 : }
395 :
396 2 : cmd = &req->cmd;
397 2 : cmd->opc = SPDK_NVME_OPC_DELETE_IO_CQ;
398 2 : cmd->cdw10_bits.delete_io_q.qid = qpair->id;
399 :
400 2 : return nvme_ctrlr_submit_admin_request(ctrlr, req);
401 : }
402 :
403 : int
404 2 : nvme_pcie_ctrlr_cmd_delete_io_sq(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair,
405 : spdk_nvme_cmd_cb cb_fn, void *cb_arg)
406 : {
407 : struct nvme_request *req;
408 : struct spdk_nvme_cmd *cmd;
409 :
410 2 : req = nvme_allocate_request_null(ctrlr->adminq, cb_fn, cb_arg);
411 2 : if (req == NULL) {
412 1 : return -ENOMEM;
413 : }
414 :
415 1 : cmd = &req->cmd;
416 1 : cmd->opc = SPDK_NVME_OPC_DELETE_IO_SQ;
417 1 : cmd->cdw10_bits.delete_io_q.qid = qpair->id;
418 :
419 1 : return nvme_ctrlr_submit_admin_request(ctrlr, req);
420 : }
421 :
422 : static void
423 1 : nvme_completion_sq_error_delete_cq_cb(void *arg, const struct spdk_nvme_cpl *cpl)
424 : {
425 1 : struct spdk_nvme_qpair *qpair = arg;
426 1 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
427 :
428 1 : if (spdk_nvme_cpl_is_error(cpl)) {
429 0 : SPDK_ERRLOG("delete_io_cq failed!\n");
430 : }
431 :
432 1 : pqpair->pcie_state = NVME_PCIE_QPAIR_FAILED;
433 1 : }
434 :
435 : static void
436 3 : nvme_completion_create_sq_cb(void *arg, const struct spdk_nvme_cpl *cpl)
437 : {
438 3 : struct spdk_nvme_qpair *qpair = arg;
439 3 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
440 3 : struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
441 3 : struct nvme_pcie_ctrlr *pctrlr = nvme_pcie_ctrlr(ctrlr);
442 : int rc;
443 :
444 3 : if (pqpair->flags.defer_destruction) {
445 : /* This qpair was deleted by the application while the
446 : * connection was still in progress. We had to wait
447 : * to free the qpair resources until this outstanding
448 : * command was completed. Now that we have the completion
449 : * free it now.
450 : */
451 0 : nvme_pcie_qpair_destroy(qpair);
452 0 : return;
453 : }
454 :
455 3 : if (spdk_nvme_cpl_is_error(cpl)) {
456 1 : SPDK_ERRLOG("nvme_create_io_sq failed, deleting cq!\n");
457 1 : rc = nvme_pcie_ctrlr_cmd_delete_io_cq(qpair->ctrlr, qpair, nvme_completion_sq_error_delete_cq_cb,
458 : qpair);
459 1 : if (rc != 0) {
460 0 : SPDK_ERRLOG("Failed to send request to delete_io_cq with rc=%d\n", rc);
461 0 : pqpair->pcie_state = NVME_PCIE_QPAIR_FAILED;
462 : }
463 1 : return;
464 : }
465 2 : pqpair->pcie_state = NVME_PCIE_QPAIR_READY;
466 2 : if (ctrlr->shadow_doorbell) {
467 1 : pqpair->shadow_doorbell.sq_tdbl = ctrlr->shadow_doorbell + (2 * qpair->id + 0) *
468 1 : pctrlr->doorbell_stride_u32;
469 1 : pqpair->shadow_doorbell.cq_hdbl = ctrlr->shadow_doorbell + (2 * qpair->id + 1) *
470 1 : pctrlr->doorbell_stride_u32;
471 1 : pqpair->shadow_doorbell.sq_eventidx = ctrlr->eventidx + (2 * qpair->id + 0) *
472 1 : pctrlr->doorbell_stride_u32;
473 1 : pqpair->shadow_doorbell.cq_eventidx = ctrlr->eventidx + (2 * qpair->id + 1) *
474 1 : pctrlr->doorbell_stride_u32;
475 1 : pqpair->flags.has_shadow_doorbell = 1;
476 : } else {
477 1 : pqpair->flags.has_shadow_doorbell = 0;
478 : }
479 2 : nvme_pcie_qpair_reset(qpair);
480 :
481 : }
482 :
483 : static void
484 4 : nvme_completion_create_cq_cb(void *arg, const struct spdk_nvme_cpl *cpl)
485 : {
486 4 : struct spdk_nvme_qpair *qpair = arg;
487 4 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
488 : int rc;
489 :
490 4 : if (pqpair->flags.defer_destruction) {
491 : /* This qpair was deleted by the application while the
492 : * connection was still in progress. We had to wait
493 : * to free the qpair resources until this outstanding
494 : * command was completed. Now that we have the completion
495 : * free it now.
496 : */
497 0 : nvme_pcie_qpair_destroy(qpair);
498 0 : return;
499 : }
500 :
501 4 : if (spdk_nvme_cpl_is_error(cpl)) {
502 1 : pqpair->pcie_state = NVME_PCIE_QPAIR_FAILED;
503 1 : SPDK_ERRLOG("nvme_create_io_cq failed!\n");
504 1 : return;
505 : }
506 :
507 3 : rc = nvme_pcie_ctrlr_cmd_create_io_sq(qpair->ctrlr, qpair, nvme_completion_create_sq_cb, qpair);
508 :
509 3 : if (rc != 0) {
510 0 : SPDK_ERRLOG("Failed to send request to create_io_sq, deleting cq!\n");
511 0 : rc = nvme_pcie_ctrlr_cmd_delete_io_cq(qpair->ctrlr, qpair, nvme_completion_sq_error_delete_cq_cb,
512 : qpair);
513 0 : if (rc != 0) {
514 0 : SPDK_ERRLOG("Failed to send request to delete_io_cq with rc=%d\n", rc);
515 0 : pqpair->pcie_state = NVME_PCIE_QPAIR_FAILED;
516 : }
517 0 : return;
518 : }
519 3 : pqpair->pcie_state = NVME_PCIE_QPAIR_WAIT_FOR_SQ;
520 : }
521 :
522 : static int
523 5 : _nvme_pcie_ctrlr_create_io_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair,
524 : uint16_t qid)
525 : {
526 5 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
527 : int rc;
528 :
529 : /* Statistics may already be allocated in the case of controller reset */
530 5 : if (qpair->poll_group) {
531 5 : struct nvme_pcie_poll_group *group = SPDK_CONTAINEROF(qpair->poll_group,
532 : struct nvme_pcie_poll_group, group);
533 :
534 5 : pqpair->stat = &group->stats;
535 5 : pqpair->shared_stats = true;
536 : } else {
537 0 : if (pqpair->stat == NULL) {
538 0 : pqpair->stat = calloc(1, sizeof(*pqpair->stat));
539 0 : if (!pqpair->stat) {
540 0 : SPDK_ERRLOG("Failed to allocate qpair statistics\n");
541 0 : nvme_qpair_set_state(qpair, NVME_QPAIR_DISCONNECTED);
542 0 : return -ENOMEM;
543 : }
544 : }
545 : }
546 :
547 5 : rc = nvme_pcie_ctrlr_cmd_create_io_cq(ctrlr, qpair, nvme_completion_create_cq_cb, qpair);
548 :
549 5 : if (rc != 0) {
550 1 : SPDK_ERRLOG("Failed to send request to create_io_cq\n");
551 1 : nvme_qpair_set_state(qpair, NVME_QPAIR_DISCONNECTED);
552 1 : return rc;
553 : }
554 4 : pqpair->pcie_state = NVME_PCIE_QPAIR_WAIT_FOR_CQ;
555 4 : return 0;
556 : }
557 :
558 : int
559 5 : nvme_pcie_ctrlr_connect_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair)
560 : {
561 5 : int rc = 0;
562 :
563 5 : if (!nvme_qpair_is_admin_queue(qpair)) {
564 5 : rc = _nvme_pcie_ctrlr_create_io_qpair(ctrlr, qpair, qpair->id);
565 : } else {
566 0 : nvme_qpair_set_state(qpair, NVME_QPAIR_CONNECTED);
567 : }
568 :
569 5 : return rc;
570 : }
571 :
572 : void
573 0 : nvme_pcie_ctrlr_disconnect_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair)
574 : {
575 0 : if (!nvme_qpair_is_admin_queue(qpair) || !ctrlr->is_disconnecting) {
576 0 : nvme_transport_ctrlr_disconnect_qpair_done(qpair);
577 : } else {
578 : /* If this function is called for the admin qpair via spdk_nvme_ctrlr_reset()
579 : * or spdk_nvme_ctrlr_disconnect(), initiate a Controller Level Reset.
580 : * Then we can abort trackers safely because the Controller Level Reset deletes
581 : * all I/O SQ/CQs.
582 : */
583 0 : nvme_ctrlr_disable(ctrlr);
584 : }
585 0 : }
586 :
587 : /* Used when dst points to MMIO (i.e. CMB) in a virtual machine - in these cases we must
588 : * not use wide instructions because QEMU will not emulate such instructions to MMIO space.
589 : * So this function ensures we only copy 8 bytes at a time.
590 : */
591 : static inline void
592 0 : nvme_pcie_copy_command_mmio(struct spdk_nvme_cmd *dst, const struct spdk_nvme_cmd *src)
593 : {
594 0 : uint64_t *dst64 = (uint64_t *)dst;
595 0 : const uint64_t *src64 = (const uint64_t *)src;
596 : uint32_t i;
597 :
598 0 : for (i = 0; i < sizeof(*dst) / 8; i++) {
599 0 : dst64[i] = src64[i];
600 : }
601 0 : }
602 :
603 : static inline void
604 0 : nvme_pcie_copy_command(struct spdk_nvme_cmd *dst, const struct spdk_nvme_cmd *src)
605 : {
606 : /* dst and src are known to be non-overlapping and 64-byte aligned. */
607 : #if defined(__SSE2__)
608 0 : __m128i *d128 = (__m128i *)dst;
609 0 : const __m128i *s128 = (const __m128i *)src;
610 :
611 0 : _mm_stream_si128(&d128[0], _mm_load_si128(&s128[0]));
612 0 : _mm_stream_si128(&d128[1], _mm_load_si128(&s128[1]));
613 0 : _mm_stream_si128(&d128[2], _mm_load_si128(&s128[2]));
614 0 : _mm_stream_si128(&d128[3], _mm_load_si128(&s128[3]));
615 : #else
616 : *dst = *src;
617 : #endif
618 0 : }
619 :
620 : void
621 0 : nvme_pcie_qpair_submit_tracker(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr)
622 : {
623 : struct nvme_request *req;
624 0 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
625 0 : struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
626 :
627 0 : req = tr->req;
628 0 : assert(req != NULL);
629 :
630 0 : spdk_trace_record(TRACE_NVME_PCIE_SUBMIT, qpair->id, 0, (uintptr_t)req, req->cb_arg,
631 : (uint32_t)req->cmd.cid, (uint32_t)req->cmd.opc,
632 : req->cmd.cdw10, req->cmd.cdw11, req->cmd.cdw12);
633 :
634 0 : if (req->cmd.fuse) {
635 : /*
636 : * Keep track of the fuse operation sequence so that we ring the doorbell only
637 : * after the second fuse is submitted.
638 : */
639 0 : qpair->last_fuse = req->cmd.fuse;
640 : }
641 :
642 : /* Don't use wide instructions to copy NVMe command, this is limited by QEMU
643 : * virtual NVMe controller, the maximum access width is 8 Bytes for one time.
644 : */
645 0 : if (spdk_unlikely((ctrlr->quirks & NVME_QUIRK_MAXIMUM_PCI_ACCESS_WIDTH) && pqpair->sq_in_cmb)) {
646 0 : nvme_pcie_copy_command_mmio(&pqpair->cmd[pqpair->sq_tail], &req->cmd);
647 : } else {
648 : /* Copy the command from the tracker to the submission queue. */
649 0 : nvme_pcie_copy_command(&pqpair->cmd[pqpair->sq_tail], &req->cmd);
650 : }
651 :
652 0 : if (spdk_unlikely(++pqpair->sq_tail == pqpair->num_entries)) {
653 0 : pqpair->sq_tail = 0;
654 : }
655 :
656 0 : if (spdk_unlikely(pqpair->sq_tail == pqpair->sq_head)) {
657 0 : SPDK_ERRLOG("sq_tail is passing sq_head!\n");
658 : }
659 :
660 0 : if (!pqpair->flags.delay_cmd_submit) {
661 0 : nvme_pcie_qpair_ring_sq_doorbell(qpair);
662 : }
663 0 : }
664 :
665 : void
666 0 : nvme_pcie_qpair_complete_tracker(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr,
667 : struct spdk_nvme_cpl *cpl, bool print_on_error)
668 : {
669 0 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
670 : struct nvme_request *req;
671 : bool retry, error;
672 : bool print_error;
673 :
674 0 : req = tr->req;
675 :
676 0 : spdk_trace_record(TRACE_NVME_PCIE_COMPLETE, qpair->id, 0, (uintptr_t)req, req->cb_arg,
677 : (uint32_t)req->cmd.cid, (uint32_t)cpl->status_raw);
678 :
679 0 : assert(req != NULL);
680 :
681 0 : error = spdk_nvme_cpl_is_error(cpl);
682 0 : retry = error && nvme_completion_is_retry(cpl) &&
683 0 : req->retries < pqpair->retry_count;
684 0 : print_error = error && print_on_error && !qpair->ctrlr->opts.disable_error_logging;
685 :
686 0 : if (print_error) {
687 0 : spdk_nvme_qpair_print_command(qpair, &req->cmd);
688 : }
689 :
690 0 : if (print_error || SPDK_DEBUGLOG_FLAG_ENABLED("nvme")) {
691 0 : spdk_nvme_qpair_print_completion(qpair, cpl);
692 : }
693 :
694 0 : assert(cpl->cid == req->cmd.cid);
695 :
696 0 : if (retry) {
697 0 : req->retries++;
698 0 : nvme_pcie_qpair_submit_tracker(qpair, tr);
699 : } else {
700 0 : TAILQ_REMOVE(&pqpair->outstanding_tr, tr, tq_list);
701 :
702 : /* Only check admin requests from different processes. */
703 0 : if (nvme_qpair_is_admin_queue(qpair) && req->pid != getpid()) {
704 0 : nvme_pcie_qpair_insert_pending_admin_request(qpair, req, cpl);
705 : } else {
706 0 : nvme_complete_request(tr->cb_fn, tr->cb_arg, qpair, req, cpl);
707 : }
708 :
709 0 : tr->req = NULL;
710 :
711 0 : TAILQ_INSERT_HEAD(&pqpair->free_tr, tr, tq_list);
712 : }
713 0 : }
714 :
715 : void
716 0 : nvme_pcie_qpair_manual_complete_tracker(struct spdk_nvme_qpair *qpair,
717 : struct nvme_tracker *tr, uint32_t sct, uint32_t sc, uint32_t dnr,
718 : bool print_on_error)
719 : {
720 0 : struct spdk_nvme_cpl cpl;
721 :
722 0 : memset(&cpl, 0, sizeof(cpl));
723 0 : cpl.sqid = qpair->id;
724 0 : cpl.cid = tr->cid;
725 0 : cpl.status.sct = sct;
726 0 : cpl.status.sc = sc;
727 0 : cpl.status.dnr = dnr;
728 0 : nvme_pcie_qpair_complete_tracker(qpair, tr, &cpl, print_on_error);
729 0 : }
730 :
731 : void
732 0 : nvme_pcie_qpair_abort_trackers(struct spdk_nvme_qpair *qpair, uint32_t dnr)
733 : {
734 0 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
735 : struct nvme_tracker *tr, *temp, *last;
736 :
737 0 : last = TAILQ_LAST(&pqpair->outstanding_tr, nvme_outstanding_tr_head);
738 :
739 : /* Abort previously submitted (outstanding) trs */
740 0 : TAILQ_FOREACH_SAFE(tr, &pqpair->outstanding_tr, tq_list, temp) {
741 0 : if (!qpair->ctrlr->opts.disable_error_logging) {
742 0 : SPDK_ERRLOG("aborting outstanding command\n");
743 : }
744 0 : nvme_pcie_qpair_manual_complete_tracker(qpair, tr, SPDK_NVME_SCT_GENERIC,
745 : SPDK_NVME_SC_ABORTED_BY_REQUEST, dnr, true);
746 :
747 0 : if (tr == last) {
748 0 : break;
749 : }
750 : }
751 0 : }
752 :
753 : void
754 1 : nvme_pcie_admin_qpair_abort_aers(struct spdk_nvme_qpair *qpair)
755 : {
756 1 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
757 : struct nvme_tracker *tr;
758 :
759 1 : tr = TAILQ_FIRST(&pqpair->outstanding_tr);
760 1 : while (tr != NULL) {
761 0 : assert(tr->req != NULL);
762 0 : if (tr->req->cmd.opc == SPDK_NVME_OPC_ASYNC_EVENT_REQUEST) {
763 0 : nvme_pcie_qpair_manual_complete_tracker(qpair, tr,
764 : SPDK_NVME_SCT_GENERIC, SPDK_NVME_SC_ABORTED_SQ_DELETION, 0,
765 : false);
766 0 : tr = TAILQ_FIRST(&pqpair->outstanding_tr);
767 : } else {
768 0 : tr = TAILQ_NEXT(tr, tq_list);
769 : }
770 : }
771 1 : }
772 :
773 : void
774 1 : nvme_pcie_admin_qpair_destroy(struct spdk_nvme_qpair *qpair)
775 : {
776 1 : nvme_pcie_admin_qpair_abort_aers(qpair);
777 1 : }
778 :
779 : void
780 0 : nvme_pcie_qpair_abort_reqs(struct spdk_nvme_qpair *qpair, uint32_t dnr)
781 : {
782 0 : nvme_pcie_qpair_abort_trackers(qpair, dnr);
783 0 : }
784 :
785 : static void
786 0 : nvme_pcie_qpair_check_timeout(struct spdk_nvme_qpair *qpair)
787 : {
788 : uint64_t t02;
789 : struct nvme_tracker *tr, *tmp;
790 0 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
791 0 : struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
792 : struct spdk_nvme_ctrlr_process *active_proc;
793 :
794 : /* Don't check timeouts during controller initialization. */
795 0 : if (ctrlr->state != NVME_CTRLR_STATE_READY) {
796 0 : return;
797 : }
798 :
799 0 : if (nvme_qpair_is_admin_queue(qpair)) {
800 0 : active_proc = nvme_ctrlr_get_current_process(ctrlr);
801 : } else {
802 0 : active_proc = qpair->active_proc;
803 : }
804 :
805 : /* Only check timeouts if the current process has a timeout callback. */
806 0 : if (active_proc == NULL || active_proc->timeout_cb_fn == NULL) {
807 0 : return;
808 : }
809 :
810 0 : t02 = spdk_get_ticks();
811 0 : TAILQ_FOREACH_SAFE(tr, &pqpair->outstanding_tr, tq_list, tmp) {
812 0 : assert(tr->req != NULL);
813 :
814 0 : if (nvme_request_check_timeout(tr->req, tr->cid, active_proc, t02)) {
815 : /*
816 : * The requests are in order, so as soon as one has not timed out,
817 : * stop iterating.
818 : */
819 0 : break;
820 : }
821 : }
822 : }
823 :
824 : int32_t
825 0 : nvme_pcie_qpair_process_completions(struct spdk_nvme_qpair *qpair, uint32_t max_completions)
826 : {
827 0 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
828 : struct nvme_tracker *tr;
829 : struct spdk_nvme_cpl *cpl, *next_cpl;
830 0 : uint32_t num_completions = 0;
831 0 : struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
832 : uint16_t next_cq_head;
833 : uint8_t next_phase;
834 0 : bool next_is_valid = false;
835 : int rc;
836 :
837 0 : if (spdk_unlikely(pqpair->pcie_state == NVME_PCIE_QPAIR_FAILED)) {
838 0 : return -ENXIO;
839 : }
840 :
841 0 : if (spdk_unlikely(nvme_qpair_get_state(qpair) == NVME_QPAIR_CONNECTING)) {
842 0 : if (pqpair->pcie_state == NVME_PCIE_QPAIR_READY) {
843 : /* It is possible that another thread set the pcie_state to
844 : * QPAIR_READY, if it polled the adminq and processed the SQ
845 : * completion for this qpair. So check for that condition
846 : * here and then update the qpair's state to CONNECTED, since
847 : * we can only set the qpair state from the qpair's thread.
848 : * (Note: this fixed issue #2157.)
849 : */
850 0 : nvme_qpair_set_state(qpair, NVME_QPAIR_CONNECTED);
851 0 : } else if (pqpair->pcie_state == NVME_PCIE_QPAIR_FAILED) {
852 0 : nvme_qpair_set_state(qpair, NVME_QPAIR_DISCONNECTED);
853 0 : return -ENXIO;
854 : } else {
855 0 : rc = spdk_nvme_qpair_process_completions(ctrlr->adminq, 0);
856 0 : if (rc < 0) {
857 0 : return rc;
858 0 : } else if (pqpair->pcie_state == NVME_PCIE_QPAIR_FAILED) {
859 0 : nvme_qpair_set_state(qpair, NVME_QPAIR_DISCONNECTED);
860 0 : return -ENXIO;
861 : }
862 : }
863 0 : return 0;
864 : }
865 :
866 0 : if (spdk_unlikely(nvme_qpair_is_admin_queue(qpair))) {
867 0 : nvme_ctrlr_lock(ctrlr);
868 : }
869 :
870 0 : if (max_completions == 0 || max_completions > pqpair->max_completions_cap) {
871 : /*
872 : * max_completions == 0 means unlimited, but complete at most
873 : * max_completions_cap batch of I/O at a time so that the completion
874 : * queue doorbells don't wrap around.
875 : */
876 0 : max_completions = pqpair->max_completions_cap;
877 : }
878 :
879 0 : pqpair->stat->polls++;
880 :
881 : while (1) {
882 0 : cpl = &pqpair->cpl[pqpair->cq_head];
883 :
884 0 : if (!next_is_valid && cpl->status.p != pqpair->flags.phase) {
885 0 : break;
886 : }
887 :
888 0 : if (spdk_likely(pqpair->cq_head + 1 != pqpair->num_entries)) {
889 0 : next_cq_head = pqpair->cq_head + 1;
890 0 : next_phase = pqpair->flags.phase;
891 : } else {
892 0 : next_cq_head = 0;
893 0 : next_phase = !pqpair->flags.phase;
894 : }
895 0 : next_cpl = &pqpair->cpl[next_cq_head];
896 0 : next_is_valid = (next_cpl->status.p == next_phase);
897 0 : if (next_is_valid) {
898 0 : __builtin_prefetch(&pqpair->tr[next_cpl->cid]);
899 : }
900 :
901 : #if defined(__PPC64__) || defined(__riscv) || defined(__loongarch__)
902 : /*
903 : * This memory barrier prevents reordering of:
904 : * - load after store from/to tr
905 : * - load after load cpl phase and cpl cid
906 : */
907 : spdk_mb();
908 : #elif defined(__aarch64__)
909 : __asm volatile("dmb oshld" ::: "memory");
910 : #endif
911 :
912 0 : if (spdk_unlikely(++pqpair->cq_head == pqpair->num_entries)) {
913 0 : pqpair->cq_head = 0;
914 0 : pqpair->flags.phase = !pqpair->flags.phase;
915 : }
916 :
917 0 : tr = &pqpair->tr[cpl->cid];
918 0 : pqpair->sq_head = cpl->sqhd;
919 :
920 0 : if (tr->req) {
921 : /* Prefetch the req's STAILQ_ENTRY since we'll need to access it
922 : * as part of putting the req back on the qpair's free list.
923 : */
924 0 : __builtin_prefetch(&tr->req->stailq);
925 0 : nvme_pcie_qpair_complete_tracker(qpair, tr, cpl, true);
926 : } else {
927 0 : SPDK_ERRLOG("cpl does not map to outstanding cmd\n");
928 0 : spdk_nvme_qpair_print_completion(qpair, cpl);
929 0 : assert(0);
930 : }
931 :
932 0 : if (++num_completions == max_completions) {
933 0 : break;
934 : }
935 : }
936 :
937 0 : if (num_completions > 0) {
938 0 : pqpair->stat->completions += num_completions;
939 0 : nvme_pcie_qpair_ring_cq_doorbell(qpair);
940 : } else {
941 0 : pqpair->stat->idle_polls++;
942 : }
943 :
944 0 : if (pqpair->flags.delay_cmd_submit) {
945 0 : if (pqpair->last_sq_tail != pqpair->sq_tail) {
946 0 : nvme_pcie_qpair_ring_sq_doorbell(qpair);
947 0 : pqpair->last_sq_tail = pqpair->sq_tail;
948 : }
949 : }
950 :
951 0 : if (spdk_unlikely(ctrlr->timeout_enabled)) {
952 : /*
953 : * User registered for timeout callback
954 : */
955 0 : nvme_pcie_qpair_check_timeout(qpair);
956 : }
957 :
958 : /* Before returning, complete any pending admin request or
959 : * process the admin qpair disconnection.
960 : */
961 0 : if (spdk_unlikely(nvme_qpair_is_admin_queue(qpair))) {
962 0 : nvme_pcie_qpair_complete_pending_admin_request(qpair);
963 :
964 0 : if (nvme_qpair_get_state(qpair) == NVME_QPAIR_DISCONNECTING) {
965 0 : rc = nvme_ctrlr_disable_poll(qpair->ctrlr);
966 0 : if (rc != -EAGAIN) {
967 0 : nvme_transport_ctrlr_disconnect_qpair_done(qpair);
968 : }
969 : }
970 :
971 0 : nvme_ctrlr_unlock(ctrlr);
972 : }
973 :
974 0 : if (spdk_unlikely(pqpair->flags.has_pending_vtophys_failures)) {
975 : struct nvme_tracker *tr, *tmp;
976 :
977 0 : TAILQ_FOREACH_SAFE(tr, &pqpair->outstanding_tr, tq_list, tmp) {
978 0 : if (tr->bad_vtophys) {
979 0 : tr->bad_vtophys = 0;
980 0 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
981 : }
982 : }
983 0 : pqpair->flags.has_pending_vtophys_failures = 0;
984 : }
985 :
986 0 : return num_completions;
987 : }
988 :
989 : int
990 4 : nvme_pcie_qpair_destroy(struct spdk_nvme_qpair *qpair)
991 : {
992 4 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
993 :
994 4 : if (nvme_qpair_is_admin_queue(qpair)) {
995 1 : nvme_pcie_admin_qpair_destroy(qpair);
996 : }
997 : /*
998 : * We check sq_vaddr and cq_vaddr to see if the user specified the memory
999 : * buffers when creating the I/O queue.
1000 : * If the user specified them, we cannot free that memory.
1001 : * Nor do we free it if it's in the CMB.
1002 : */
1003 4 : if (!pqpair->sq_vaddr && pqpair->cmd && !pqpair->sq_in_cmb) {
1004 2 : spdk_free(pqpair->cmd);
1005 : }
1006 4 : if (!pqpair->cq_vaddr && pqpair->cpl) {
1007 2 : spdk_free(pqpair->cpl);
1008 : }
1009 4 : if (pqpair->tr) {
1010 4 : spdk_free(pqpair->tr);
1011 : }
1012 :
1013 4 : nvme_qpair_deinit(qpair);
1014 :
1015 4 : if (!pqpair->shared_stats && (!qpair->active_proc ||
1016 0 : qpair->active_proc == nvme_ctrlr_get_current_process(qpair->ctrlr))) {
1017 4 : if (qpair->id) {
1018 3 : free(pqpair->stat);
1019 : } else {
1020 : /* statistics of admin qpair are allocates from huge pages because
1021 : * admin qpair is shared for multi-process */
1022 1 : spdk_free(pqpair->stat);
1023 : }
1024 :
1025 : }
1026 :
1027 4 : spdk_free(pqpair);
1028 :
1029 4 : return 0;
1030 : }
1031 :
1032 : struct spdk_nvme_qpair *
1033 0 : nvme_pcie_ctrlr_create_io_qpair(struct spdk_nvme_ctrlr *ctrlr, uint16_t qid,
1034 : const struct spdk_nvme_io_qpair_opts *opts)
1035 : {
1036 : struct nvme_pcie_qpair *pqpair;
1037 : struct spdk_nvme_qpair *qpair;
1038 : int rc;
1039 :
1040 0 : assert(ctrlr != NULL);
1041 :
1042 0 : pqpair = spdk_zmalloc(sizeof(*pqpair), 64, NULL,
1043 : SPDK_ENV_SOCKET_ID_ANY, SPDK_MALLOC_SHARE);
1044 0 : if (pqpair == NULL) {
1045 0 : return NULL;
1046 : }
1047 :
1048 0 : pqpair->num_entries = opts->io_queue_size;
1049 0 : pqpair->flags.delay_cmd_submit = opts->delay_cmd_submit;
1050 :
1051 0 : qpair = &pqpair->qpair;
1052 :
1053 0 : rc = nvme_qpair_init(qpair, qid, ctrlr, opts->qprio, opts->io_queue_requests, opts->async_mode);
1054 0 : if (rc != 0) {
1055 0 : nvme_pcie_qpair_destroy(qpair);
1056 0 : return NULL;
1057 : }
1058 :
1059 0 : rc = nvme_pcie_qpair_construct(qpair, opts);
1060 :
1061 0 : if (rc != 0) {
1062 0 : nvme_pcie_qpair_destroy(qpair);
1063 0 : return NULL;
1064 : }
1065 :
1066 0 : return qpair;
1067 : }
1068 :
1069 : int
1070 0 : nvme_pcie_ctrlr_delete_io_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair)
1071 : {
1072 0 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
1073 : struct nvme_completion_poll_status *status;
1074 : int rc;
1075 :
1076 0 : assert(ctrlr != NULL);
1077 :
1078 0 : if (ctrlr->is_removed) {
1079 0 : goto free;
1080 : }
1081 :
1082 0 : if (ctrlr->prepare_for_reset) {
1083 0 : if (nvme_qpair_get_state(qpair) == NVME_QPAIR_CONNECTING) {
1084 0 : pqpair->flags.defer_destruction = true;
1085 : }
1086 0 : goto clear_shadow_doorbells;
1087 : }
1088 :
1089 : /* If attempting to delete a qpair that's still being connected, we have to wait until it's
1090 : * finished, so that we don't free it while it's waiting for the create cq/sq callbacks.
1091 : */
1092 0 : while (pqpair->pcie_state == NVME_PCIE_QPAIR_WAIT_FOR_CQ ||
1093 0 : pqpair->pcie_state == NVME_PCIE_QPAIR_WAIT_FOR_SQ) {
1094 0 : rc = spdk_nvme_qpair_process_completions(ctrlr->adminq, 0);
1095 0 : if (rc < 0) {
1096 0 : break;
1097 : }
1098 : }
1099 :
1100 0 : status = calloc(1, sizeof(*status));
1101 0 : if (!status) {
1102 0 : SPDK_ERRLOG("Failed to allocate status tracker\n");
1103 0 : goto free;
1104 : }
1105 :
1106 : /* Delete the I/O submission queue */
1107 0 : rc = nvme_pcie_ctrlr_cmd_delete_io_sq(ctrlr, qpair, nvme_completion_poll_cb, status);
1108 0 : if (rc != 0) {
1109 0 : SPDK_ERRLOG("Failed to send request to delete_io_sq with rc=%d\n", rc);
1110 0 : free(status);
1111 0 : goto free;
1112 : }
1113 0 : if (nvme_wait_for_completion(ctrlr->adminq, status)) {
1114 0 : if (!status->timed_out) {
1115 0 : free(status);
1116 : }
1117 0 : goto free;
1118 : }
1119 :
1120 : /* Now that the submission queue is deleted, the device is supposed to have
1121 : * completed any outstanding I/O. Try to complete them. If they don't complete,
1122 : * they'll be marked as aborted and completed below. */
1123 0 : if (qpair->active_proc == nvme_ctrlr_get_current_process(ctrlr)) {
1124 0 : nvme_pcie_qpair_process_completions(qpair, 0);
1125 : }
1126 :
1127 0 : memset(status, 0, sizeof(*status));
1128 : /* Delete the completion queue */
1129 0 : rc = nvme_pcie_ctrlr_cmd_delete_io_cq(ctrlr, qpair, nvme_completion_poll_cb, status);
1130 0 : if (rc != 0) {
1131 0 : SPDK_ERRLOG("Failed to send request to delete_io_cq with rc=%d\n", rc);
1132 0 : free(status);
1133 0 : goto free;
1134 : }
1135 0 : if (nvme_wait_for_completion(ctrlr->adminq, status)) {
1136 0 : if (!status->timed_out) {
1137 0 : free(status);
1138 : }
1139 0 : goto free;
1140 : }
1141 0 : free(status);
1142 :
1143 0 : clear_shadow_doorbells:
1144 0 : if (pqpair->flags.has_shadow_doorbell && ctrlr->shadow_doorbell) {
1145 0 : *pqpair->shadow_doorbell.sq_tdbl = 0;
1146 0 : *pqpair->shadow_doorbell.cq_hdbl = 0;
1147 0 : *pqpair->shadow_doorbell.sq_eventidx = 0;
1148 0 : *pqpair->shadow_doorbell.cq_eventidx = 0;
1149 : }
1150 0 : free:
1151 0 : if (qpair->no_deletion_notification_needed == 0) {
1152 : /* Abort the rest of the I/O */
1153 0 : nvme_pcie_qpair_abort_trackers(qpair, 1);
1154 : }
1155 :
1156 0 : if (!pqpair->flags.defer_destruction) {
1157 0 : nvme_pcie_qpair_destroy(qpair);
1158 : }
1159 0 : return 0;
1160 : }
1161 :
1162 : static void
1163 3 : nvme_pcie_fail_request_bad_vtophys(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr)
1164 : {
1165 3 : if (!qpair->in_completion_context) {
1166 3 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
1167 :
1168 3 : tr->bad_vtophys = 1;
1169 3 : pqpair->flags.has_pending_vtophys_failures = 1;
1170 3 : return;
1171 : }
1172 :
1173 : /*
1174 : * Bad vtophys translation, so abort this request and return
1175 : * immediately.
1176 : */
1177 0 : SPDK_ERRLOG("vtophys or other payload buffer related error\n");
1178 0 : nvme_pcie_qpair_manual_complete_tracker(qpair, tr, SPDK_NVME_SCT_GENERIC,
1179 : SPDK_NVME_SC_INVALID_FIELD,
1180 : 1 /* do not retry */, true);
1181 : }
1182 :
1183 : /*
1184 : * Append PRP list entries to describe a virtually contiguous buffer starting at virt_addr of len bytes.
1185 : *
1186 : * *prp_index will be updated to account for the number of PRP entries used.
1187 : */
1188 : static inline int
1189 25 : nvme_pcie_prp_list_append(struct spdk_nvme_ctrlr *ctrlr, struct nvme_tracker *tr,
1190 : uint32_t *prp_index, void *virt_addr, size_t len,
1191 : uint32_t page_size)
1192 : {
1193 25 : struct spdk_nvme_cmd *cmd = &tr->req->cmd;
1194 25 : uintptr_t page_mask = page_size - 1;
1195 : uint64_t phys_addr;
1196 : uint32_t i;
1197 :
1198 25 : SPDK_DEBUGLOG(nvme, "prp_index:%u virt_addr:%p len:%u\n",
1199 : *prp_index, virt_addr, (uint32_t)len);
1200 :
1201 25 : if (spdk_unlikely(((uintptr_t)virt_addr & 3) != 0)) {
1202 2 : SPDK_ERRLOG("virt_addr %p not dword aligned\n", virt_addr);
1203 2 : return -EFAULT;
1204 : }
1205 :
1206 23 : i = *prp_index;
1207 2070 : while (len) {
1208 : uint32_t seg_len;
1209 :
1210 : /*
1211 : * prp_index 0 is stored in prp1, and the rest are stored in the prp[] array,
1212 : * so prp_index == count is valid.
1213 : */
1214 2051 : if (spdk_unlikely(i > SPDK_COUNTOF(tr->u.prp))) {
1215 2 : SPDK_ERRLOG("out of PRP entries\n");
1216 2 : return -EFAULT;
1217 : }
1218 :
1219 2049 : phys_addr = nvme_pcie_vtophys(ctrlr, virt_addr, NULL);
1220 2049 : if (spdk_unlikely(phys_addr == SPDK_VTOPHYS_ERROR)) {
1221 1 : SPDK_ERRLOG("vtophys(%p) failed\n", virt_addr);
1222 1 : return -EFAULT;
1223 : }
1224 :
1225 2048 : if (i == 0) {
1226 19 : SPDK_DEBUGLOG(nvme, "prp1 = %p\n", (void *)phys_addr);
1227 19 : cmd->dptr.prp.prp1 = phys_addr;
1228 19 : seg_len = page_size - ((uintptr_t)virt_addr & page_mask);
1229 : } else {
1230 2029 : if ((phys_addr & page_mask) != 0) {
1231 1 : SPDK_ERRLOG("PRP %u not page aligned (%p)\n", i, virt_addr);
1232 1 : return -EFAULT;
1233 : }
1234 :
1235 2028 : SPDK_DEBUGLOG(nvme, "prp[%u] = %p\n", i - 1, (void *)phys_addr);
1236 2028 : tr->u.prp[i - 1] = phys_addr;
1237 2028 : seg_len = page_size;
1238 : }
1239 :
1240 2047 : seg_len = spdk_min(seg_len, len);
1241 2047 : virt_addr = (uint8_t *)virt_addr + seg_len;
1242 2047 : len -= seg_len;
1243 2047 : i++;
1244 : }
1245 :
1246 19 : cmd->psdt = SPDK_NVME_PSDT_PRP;
1247 19 : if (i <= 1) {
1248 6 : cmd->dptr.prp.prp2 = 0;
1249 13 : } else if (i == 2) {
1250 6 : cmd->dptr.prp.prp2 = tr->u.prp[0];
1251 6 : SPDK_DEBUGLOG(nvme, "prp2 = %p\n", (void *)cmd->dptr.prp.prp2);
1252 : } else {
1253 7 : cmd->dptr.prp.prp2 = tr->prp_sgl_bus_addr;
1254 7 : SPDK_DEBUGLOG(nvme, "prp2 = %p (PRP list)\n", (void *)cmd->dptr.prp.prp2);
1255 : }
1256 :
1257 19 : *prp_index = i;
1258 19 : return 0;
1259 : }
1260 :
1261 : static int
1262 0 : nvme_pcie_qpair_build_request_invalid(struct spdk_nvme_qpair *qpair,
1263 : struct nvme_request *req, struct nvme_tracker *tr, bool dword_aligned)
1264 : {
1265 0 : assert(0);
1266 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1267 : return -EINVAL;
1268 : }
1269 :
1270 : /**
1271 : * Build PRP list describing physically contiguous payload buffer.
1272 : */
1273 : static int
1274 4 : nvme_pcie_qpair_build_contig_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req,
1275 : struct nvme_tracker *tr, bool dword_aligned)
1276 : {
1277 4 : uint32_t prp_index = 0;
1278 : int rc;
1279 :
1280 4 : rc = nvme_pcie_prp_list_append(qpair->ctrlr, tr, &prp_index,
1281 4 : (uint8_t *)req->payload.contig_or_cb_arg + req->payload_offset,
1282 4 : req->payload_size, qpair->ctrlr->page_size);
1283 4 : if (rc) {
1284 1 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1285 : }
1286 :
1287 4 : return rc;
1288 : }
1289 :
1290 : /**
1291 : * Build an SGL describing a physically contiguous payload buffer.
1292 : *
1293 : * This is more efficient than using PRP because large buffers can be
1294 : * described this way.
1295 : */
1296 : static int
1297 3 : nvme_pcie_qpair_build_contig_hw_sgl_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req,
1298 : struct nvme_tracker *tr, bool dword_aligned)
1299 : {
1300 : uint8_t *virt_addr;
1301 3 : uint64_t phys_addr, mapping_length;
1302 : uint32_t length;
1303 : struct spdk_nvme_sgl_descriptor *sgl;
1304 3 : uint32_t nseg = 0;
1305 :
1306 3 : assert(req->payload_size != 0);
1307 3 : assert(nvme_payload_type(&req->payload) == NVME_PAYLOAD_TYPE_CONTIG);
1308 :
1309 3 : sgl = tr->u.sgl;
1310 3 : req->cmd.psdt = SPDK_NVME_PSDT_SGL_MPTR_CONTIG;
1311 3 : req->cmd.dptr.sgl1.unkeyed.subtype = 0;
1312 :
1313 3 : length = req->payload_size;
1314 : /* ubsan complains about applying zero offset to null pointer if contig_or_cb_arg is NULL,
1315 : * so just double cast it to make it go away */
1316 3 : virt_addr = (uint8_t *)((uintptr_t)req->payload.contig_or_cb_arg + req->payload_offset);
1317 :
1318 7 : while (length > 0) {
1319 4 : if (nseg >= NVME_MAX_SGL_DESCRIPTORS) {
1320 0 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1321 0 : return -EFAULT;
1322 : }
1323 :
1324 4 : if (dword_aligned && ((uintptr_t)virt_addr & 3)) {
1325 0 : SPDK_ERRLOG("virt_addr %p not dword aligned\n", virt_addr);
1326 0 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1327 0 : return -EFAULT;
1328 : }
1329 :
1330 4 : mapping_length = length;
1331 4 : phys_addr = nvme_pcie_vtophys(qpair->ctrlr, virt_addr, &mapping_length);
1332 4 : if (phys_addr == SPDK_VTOPHYS_ERROR) {
1333 0 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1334 0 : return -EFAULT;
1335 : }
1336 :
1337 4 : mapping_length = spdk_min(length, mapping_length);
1338 :
1339 4 : length -= mapping_length;
1340 4 : virt_addr += mapping_length;
1341 :
1342 4 : sgl->unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK;
1343 4 : sgl->unkeyed.length = mapping_length;
1344 4 : sgl->address = phys_addr;
1345 4 : sgl->unkeyed.subtype = 0;
1346 :
1347 4 : sgl++;
1348 4 : nseg++;
1349 : }
1350 :
1351 3 : if (nseg == 1) {
1352 : /*
1353 : * The whole transfer can be described by a single SGL descriptor.
1354 : * Use the special case described by the spec where SGL1's type is Data Block.
1355 : * This means the SGL in the tracker is not used at all, so copy the first (and only)
1356 : * SGL element into SGL1.
1357 : */
1358 2 : req->cmd.dptr.sgl1.unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK;
1359 2 : req->cmd.dptr.sgl1.address = tr->u.sgl[0].address;
1360 2 : req->cmd.dptr.sgl1.unkeyed.length = tr->u.sgl[0].unkeyed.length;
1361 : } else {
1362 : /* SPDK NVMe driver supports only 1 SGL segment for now, it is enough because
1363 : * NVME_MAX_SGL_DESCRIPTORS * 16 is less than one page.
1364 : */
1365 1 : req->cmd.dptr.sgl1.unkeyed.type = SPDK_NVME_SGL_TYPE_LAST_SEGMENT;
1366 1 : req->cmd.dptr.sgl1.address = tr->prp_sgl_bus_addr;
1367 1 : req->cmd.dptr.sgl1.unkeyed.length = nseg * sizeof(struct spdk_nvme_sgl_descriptor);
1368 : }
1369 :
1370 3 : return 0;
1371 : }
1372 :
1373 : /**
1374 : * Build SGL list describing scattered payload buffer.
1375 : */
1376 : static int
1377 2 : nvme_pcie_qpair_build_hw_sgl_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req,
1378 : struct nvme_tracker *tr, bool dword_aligned)
1379 : {
1380 : int rc;
1381 2 : void *virt_addr;
1382 2 : uint64_t phys_addr, mapping_length;
1383 2 : uint32_t remaining_transfer_len, remaining_user_sge_len, length;
1384 : struct spdk_nvme_sgl_descriptor *sgl;
1385 2 : uint32_t nseg = 0;
1386 :
1387 : /*
1388 : * Build scattered payloads.
1389 : */
1390 2 : assert(req->payload_size != 0);
1391 2 : assert(nvme_payload_type(&req->payload) == NVME_PAYLOAD_TYPE_SGL);
1392 2 : assert(req->payload.reset_sgl_fn != NULL);
1393 2 : assert(req->payload.next_sge_fn != NULL);
1394 2 : req->payload.reset_sgl_fn(req->payload.contig_or_cb_arg, req->payload_offset);
1395 :
1396 2 : sgl = tr->u.sgl;
1397 2 : req->cmd.psdt = SPDK_NVME_PSDT_SGL_MPTR_CONTIG;
1398 2 : req->cmd.dptr.sgl1.unkeyed.subtype = 0;
1399 :
1400 2 : remaining_transfer_len = req->payload_size;
1401 :
1402 6 : while (remaining_transfer_len > 0) {
1403 4 : rc = req->payload.next_sge_fn(req->payload.contig_or_cb_arg,
1404 : &virt_addr, &remaining_user_sge_len);
1405 4 : if (rc) {
1406 0 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1407 0 : return -EFAULT;
1408 : }
1409 :
1410 : /* Bit Bucket SGL descriptor */
1411 4 : if ((uint64_t)virt_addr == UINT64_MAX) {
1412 : /* TODO: enable WRITE and COMPARE when necessary */
1413 0 : if (req->cmd.opc != SPDK_NVME_OPC_READ) {
1414 0 : SPDK_ERRLOG("Only READ command can be supported\n");
1415 0 : goto exit;
1416 : }
1417 0 : if (nseg >= NVME_MAX_SGL_DESCRIPTORS) {
1418 0 : SPDK_ERRLOG("Too many SGL entries\n");
1419 0 : goto exit;
1420 : }
1421 :
1422 0 : sgl->unkeyed.type = SPDK_NVME_SGL_TYPE_BIT_BUCKET;
1423 : /* If the SGL describes a destination data buffer, the length of data
1424 : * buffer shall be discarded by controller, and the length is included
1425 : * in Number of Logical Blocks (NLB) parameter. Otherwise, the length
1426 : * is not included in the NLB parameter.
1427 : */
1428 0 : remaining_user_sge_len = spdk_min(remaining_user_sge_len, remaining_transfer_len);
1429 0 : remaining_transfer_len -= remaining_user_sge_len;
1430 :
1431 0 : sgl->unkeyed.length = remaining_user_sge_len;
1432 0 : sgl->address = 0;
1433 0 : sgl->unkeyed.subtype = 0;
1434 :
1435 0 : sgl++;
1436 0 : nseg++;
1437 :
1438 0 : continue;
1439 : }
1440 :
1441 4 : remaining_user_sge_len = spdk_min(remaining_user_sge_len, remaining_transfer_len);
1442 4 : remaining_transfer_len -= remaining_user_sge_len;
1443 8 : while (remaining_user_sge_len > 0) {
1444 4 : if (nseg >= NVME_MAX_SGL_DESCRIPTORS) {
1445 0 : SPDK_ERRLOG("Too many SGL entries\n");
1446 0 : goto exit;
1447 : }
1448 :
1449 4 : if (dword_aligned && ((uintptr_t)virt_addr & 3)) {
1450 0 : SPDK_ERRLOG("virt_addr %p not dword aligned\n", virt_addr);
1451 0 : goto exit;
1452 : }
1453 :
1454 4 : mapping_length = remaining_user_sge_len;
1455 4 : phys_addr = nvme_pcie_vtophys(qpair->ctrlr, virt_addr, &mapping_length);
1456 4 : if (phys_addr == SPDK_VTOPHYS_ERROR) {
1457 0 : goto exit;
1458 : }
1459 :
1460 4 : length = spdk_min(remaining_user_sge_len, mapping_length);
1461 4 : remaining_user_sge_len -= length;
1462 4 : virt_addr = (uint8_t *)virt_addr + length;
1463 :
1464 4 : if (nseg > 0 && phys_addr ==
1465 2 : (*(sgl - 1)).address + (*(sgl - 1)).unkeyed.length) {
1466 : /* extend previous entry */
1467 0 : (*(sgl - 1)).unkeyed.length += length;
1468 0 : continue;
1469 : }
1470 :
1471 4 : sgl->unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK;
1472 4 : sgl->unkeyed.length = length;
1473 4 : sgl->address = phys_addr;
1474 4 : sgl->unkeyed.subtype = 0;
1475 :
1476 4 : sgl++;
1477 4 : nseg++;
1478 : }
1479 : }
1480 :
1481 2 : if (nseg == 1) {
1482 : /*
1483 : * The whole transfer can be described by a single SGL descriptor.
1484 : * Use the special case described by the spec where SGL1's type is Data Block.
1485 : * This means the SGL in the tracker is not used at all, so copy the first (and only)
1486 : * SGL element into SGL1.
1487 : */
1488 1 : req->cmd.dptr.sgl1.unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK;
1489 1 : req->cmd.dptr.sgl1.address = tr->u.sgl[0].address;
1490 1 : req->cmd.dptr.sgl1.unkeyed.length = tr->u.sgl[0].unkeyed.length;
1491 : } else {
1492 : /* SPDK NVMe driver supports only 1 SGL segment for now, it is enough because
1493 : * NVME_MAX_SGL_DESCRIPTORS * 16 is less than one page.
1494 : */
1495 1 : req->cmd.dptr.sgl1.unkeyed.type = SPDK_NVME_SGL_TYPE_LAST_SEGMENT;
1496 1 : req->cmd.dptr.sgl1.address = tr->prp_sgl_bus_addr;
1497 1 : req->cmd.dptr.sgl1.unkeyed.length = nseg * sizeof(struct spdk_nvme_sgl_descriptor);
1498 : }
1499 :
1500 2 : return 0;
1501 :
1502 0 : exit:
1503 0 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1504 0 : return -EFAULT;
1505 : }
1506 :
1507 : /**
1508 : * Build PRP list describing scattered payload buffer.
1509 : */
1510 : static int
1511 1 : nvme_pcie_qpair_build_prps_sgl_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req,
1512 : struct nvme_tracker *tr, bool dword_aligned)
1513 : {
1514 : int rc;
1515 1 : void *virt_addr;
1516 1 : uint32_t remaining_transfer_len, length;
1517 1 : uint32_t prp_index = 0;
1518 1 : uint32_t page_size = qpair->ctrlr->page_size;
1519 :
1520 : /*
1521 : * Build scattered payloads.
1522 : */
1523 1 : assert(nvme_payload_type(&req->payload) == NVME_PAYLOAD_TYPE_SGL);
1524 1 : assert(req->payload.reset_sgl_fn != NULL);
1525 1 : req->payload.reset_sgl_fn(req->payload.contig_or_cb_arg, req->payload_offset);
1526 :
1527 1 : remaining_transfer_len = req->payload_size;
1528 2 : while (remaining_transfer_len > 0) {
1529 1 : assert(req->payload.next_sge_fn != NULL);
1530 1 : rc = req->payload.next_sge_fn(req->payload.contig_or_cb_arg, &virt_addr, &length);
1531 1 : if (rc) {
1532 0 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1533 0 : return -EFAULT;
1534 : }
1535 :
1536 1 : length = spdk_min(remaining_transfer_len, length);
1537 :
1538 : /*
1539 : * Any incompatible sges should have been handled up in the splitting routine,
1540 : * but assert here as an additional check.
1541 : *
1542 : * All SGEs except last must end on a page boundary.
1543 : */
1544 1 : assert((length == remaining_transfer_len) ||
1545 : _is_page_aligned((uintptr_t)virt_addr + length, page_size));
1546 :
1547 1 : rc = nvme_pcie_prp_list_append(qpair->ctrlr, tr, &prp_index, virt_addr, length, page_size);
1548 1 : if (rc) {
1549 0 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1550 0 : return rc;
1551 : }
1552 :
1553 1 : remaining_transfer_len -= length;
1554 : }
1555 :
1556 1 : return 0;
1557 : }
1558 :
1559 : typedef int(*build_req_fn)(struct spdk_nvme_qpair *, struct nvme_request *, struct nvme_tracker *,
1560 : bool);
1561 :
1562 : static build_req_fn const g_nvme_pcie_build_req_table[][2] = {
1563 : [NVME_PAYLOAD_TYPE_INVALID] = {
1564 : nvme_pcie_qpair_build_request_invalid, /* PRP */
1565 : nvme_pcie_qpair_build_request_invalid /* SGL */
1566 : },
1567 : [NVME_PAYLOAD_TYPE_CONTIG] = {
1568 : nvme_pcie_qpair_build_contig_request, /* PRP */
1569 : nvme_pcie_qpair_build_contig_hw_sgl_request /* SGL */
1570 : },
1571 : [NVME_PAYLOAD_TYPE_SGL] = {
1572 : nvme_pcie_qpair_build_prps_sgl_request, /* PRP */
1573 : nvme_pcie_qpair_build_hw_sgl_request /* SGL */
1574 : }
1575 : };
1576 :
1577 : static int
1578 5 : nvme_pcie_qpair_build_metadata(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr,
1579 : bool sgl_supported, bool mptr_sgl_supported, bool dword_aligned)
1580 : {
1581 : void *md_payload;
1582 5 : struct nvme_request *req = tr->req;
1583 5 : uint64_t mapping_length;
1584 :
1585 5 : if (req->payload.md) {
1586 5 : md_payload = (uint8_t *)req->payload.md + req->md_offset;
1587 5 : if (dword_aligned && ((uintptr_t)md_payload & 3)) {
1588 0 : SPDK_ERRLOG("virt_addr %p not dword aligned\n", md_payload);
1589 0 : goto exit;
1590 : }
1591 :
1592 5 : mapping_length = req->md_size;
1593 5 : if (sgl_supported && mptr_sgl_supported && dword_aligned) {
1594 2 : assert(req->cmd.psdt == SPDK_NVME_PSDT_SGL_MPTR_CONTIG);
1595 2 : req->cmd.psdt = SPDK_NVME_PSDT_SGL_MPTR_SGL;
1596 :
1597 2 : tr->meta_sgl.address = nvme_pcie_vtophys(qpair->ctrlr, md_payload, &mapping_length);
1598 2 : if (tr->meta_sgl.address == SPDK_VTOPHYS_ERROR || mapping_length != req->md_size) {
1599 1 : goto exit;
1600 : }
1601 1 : tr->meta_sgl.unkeyed.type = SPDK_NVME_SGL_TYPE_DATA_BLOCK;
1602 1 : tr->meta_sgl.unkeyed.length = req->md_size;
1603 1 : tr->meta_sgl.unkeyed.subtype = 0;
1604 1 : req->cmd.mptr = tr->prp_sgl_bus_addr - sizeof(struct spdk_nvme_sgl_descriptor);
1605 : } else {
1606 3 : req->cmd.mptr = nvme_pcie_vtophys(qpair->ctrlr, md_payload, &mapping_length);
1607 3 : if (req->cmd.mptr == SPDK_VTOPHYS_ERROR || mapping_length != req->md_size) {
1608 1 : goto exit;
1609 : }
1610 : }
1611 : }
1612 :
1613 3 : return 0;
1614 :
1615 2 : exit:
1616 2 : nvme_pcie_fail_request_bad_vtophys(qpair, tr);
1617 2 : return -EINVAL;
1618 : }
1619 :
1620 : int
1621 0 : nvme_pcie_qpair_submit_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req)
1622 : {
1623 : struct nvme_tracker *tr;
1624 0 : int rc = 0;
1625 0 : struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
1626 0 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
1627 : enum nvme_payload_type payload_type;
1628 : bool sgl_supported;
1629 : bool mptr_sgl_supported;
1630 0 : bool dword_aligned = true;
1631 :
1632 0 : if (spdk_unlikely(nvme_qpair_is_admin_queue(qpair))) {
1633 0 : nvme_ctrlr_lock(ctrlr);
1634 : }
1635 :
1636 0 : tr = TAILQ_FIRST(&pqpair->free_tr);
1637 :
1638 0 : if (tr == NULL) {
1639 0 : pqpair->stat->queued_requests++;
1640 : /* Inform the upper layer to try again later. */
1641 0 : rc = -EAGAIN;
1642 0 : goto exit;
1643 : }
1644 :
1645 0 : pqpair->stat->submitted_requests++;
1646 0 : TAILQ_REMOVE(&pqpair->free_tr, tr, tq_list); /* remove tr from free_tr */
1647 0 : TAILQ_INSERT_TAIL(&pqpair->outstanding_tr, tr, tq_list);
1648 0 : tr->req = req;
1649 0 : tr->cb_fn = req->cb_fn;
1650 0 : tr->cb_arg = req->cb_arg;
1651 0 : req->cmd.cid = tr->cid;
1652 :
1653 0 : if (req->payload_size != 0) {
1654 0 : payload_type = nvme_payload_type(&req->payload);
1655 : /* According to the specification, PRPs shall be used for all
1656 : * Admin commands for NVMe over PCIe implementations.
1657 : */
1658 0 : sgl_supported = (ctrlr->flags & SPDK_NVME_CTRLR_SGL_SUPPORTED) != 0 &&
1659 0 : !nvme_qpair_is_admin_queue(qpair);
1660 0 : mptr_sgl_supported = (ctrlr->flags & SPDK_NVME_CTRLR_MPTR_SGL_SUPPORTED) != 0 &&
1661 0 : !nvme_qpair_is_admin_queue(qpair);
1662 :
1663 0 : if (sgl_supported) {
1664 : /* Don't use SGL for DSM command */
1665 0 : if (spdk_unlikely((ctrlr->quirks & NVME_QUIRK_NO_SGL_FOR_DSM) &&
1666 : (req->cmd.opc == SPDK_NVME_OPC_DATASET_MANAGEMENT))) {
1667 0 : sgl_supported = false;
1668 : }
1669 : }
1670 :
1671 0 : if (sgl_supported && !(ctrlr->flags & SPDK_NVME_CTRLR_SGL_REQUIRES_DWORD_ALIGNMENT)) {
1672 0 : dword_aligned = false;
1673 : }
1674 :
1675 : /* If we fail to build the request or the metadata, do not return the -EFAULT back up
1676 : * the stack. This ensures that we always fail these types of requests via a
1677 : * completion callback, and never in the context of the submission.
1678 : */
1679 0 : rc = g_nvme_pcie_build_req_table[payload_type][sgl_supported](qpair, req, tr, dword_aligned);
1680 0 : if (rc < 0) {
1681 0 : assert(rc == -EFAULT);
1682 0 : rc = 0;
1683 0 : goto exit;
1684 : }
1685 :
1686 0 : rc = nvme_pcie_qpair_build_metadata(qpair, tr, sgl_supported, mptr_sgl_supported, dword_aligned);
1687 0 : if (rc < 0) {
1688 0 : assert(rc == -EFAULT);
1689 0 : rc = 0;
1690 0 : goto exit;
1691 : }
1692 : }
1693 :
1694 0 : nvme_pcie_qpair_submit_tracker(qpair, tr);
1695 :
1696 0 : exit:
1697 0 : if (spdk_unlikely(nvme_qpair_is_admin_queue(qpair))) {
1698 0 : nvme_ctrlr_unlock(ctrlr);
1699 : }
1700 :
1701 0 : return rc;
1702 : }
1703 :
1704 : struct spdk_nvme_transport_poll_group *
1705 1 : nvme_pcie_poll_group_create(void)
1706 : {
1707 1 : struct nvme_pcie_poll_group *group = calloc(1, sizeof(*group));
1708 :
1709 1 : if (group == NULL) {
1710 0 : SPDK_ERRLOG("Unable to allocate poll group.\n");
1711 0 : return NULL;
1712 : }
1713 :
1714 1 : return &group->group;
1715 : }
1716 :
1717 : int
1718 0 : nvme_pcie_poll_group_connect_qpair(struct spdk_nvme_qpair *qpair)
1719 : {
1720 0 : return 0;
1721 : }
1722 :
1723 : int
1724 0 : nvme_pcie_poll_group_disconnect_qpair(struct spdk_nvme_qpair *qpair)
1725 : {
1726 0 : return 0;
1727 : }
1728 :
1729 : int
1730 0 : nvme_pcie_poll_group_add(struct spdk_nvme_transport_poll_group *tgroup,
1731 : struct spdk_nvme_qpair *qpair)
1732 : {
1733 0 : return 0;
1734 : }
1735 :
1736 : int
1737 0 : nvme_pcie_poll_group_remove(struct spdk_nvme_transport_poll_group *tgroup,
1738 : struct spdk_nvme_qpair *qpair)
1739 : {
1740 0 : struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
1741 :
1742 0 : pqpair->stat = &g_dummy_stat;
1743 0 : return 0;
1744 : }
1745 :
1746 : int64_t
1747 0 : nvme_pcie_poll_group_process_completions(struct spdk_nvme_transport_poll_group *tgroup,
1748 : uint32_t completions_per_qpair, spdk_nvme_disconnected_qpair_cb disconnected_qpair_cb)
1749 : {
1750 : struct spdk_nvme_qpair *qpair, *tmp_qpair;
1751 0 : int32_t local_completions = 0;
1752 0 : int64_t total_completions = 0;
1753 :
1754 0 : STAILQ_FOREACH_SAFE(qpair, &tgroup->disconnected_qpairs, poll_group_stailq, tmp_qpair) {
1755 0 : disconnected_qpair_cb(qpair, tgroup->group->ctx);
1756 : }
1757 :
1758 0 : STAILQ_FOREACH_SAFE(qpair, &tgroup->connected_qpairs, poll_group_stailq, tmp_qpair) {
1759 0 : local_completions = spdk_nvme_qpair_process_completions(qpair, completions_per_qpair);
1760 0 : if (spdk_unlikely(local_completions < 0)) {
1761 0 : disconnected_qpair_cb(qpair, tgroup->group->ctx);
1762 0 : total_completions = -ENXIO;
1763 0 : } else if (spdk_likely(total_completions >= 0)) {
1764 0 : total_completions += local_completions;
1765 : }
1766 : }
1767 :
1768 0 : return total_completions;
1769 : }
1770 :
1771 : int
1772 1 : nvme_pcie_poll_group_destroy(struct spdk_nvme_transport_poll_group *tgroup)
1773 : {
1774 1 : if (!STAILQ_EMPTY(&tgroup->connected_qpairs) || !STAILQ_EMPTY(&tgroup->disconnected_qpairs)) {
1775 0 : return -EBUSY;
1776 : }
1777 :
1778 1 : free(tgroup);
1779 :
1780 1 : return 0;
1781 : }
1782 :
1783 : int
1784 3 : nvme_pcie_poll_group_get_stats(struct spdk_nvme_transport_poll_group *tgroup,
1785 : struct spdk_nvme_transport_poll_group_stat **_stats)
1786 : {
1787 : struct nvme_pcie_poll_group *group;
1788 : struct spdk_nvme_transport_poll_group_stat *stats;
1789 :
1790 3 : if (tgroup == NULL || _stats == NULL) {
1791 2 : SPDK_ERRLOG("Invalid stats or group pointer\n");
1792 2 : return -EINVAL;
1793 : }
1794 :
1795 1 : stats = calloc(1, sizeof(*stats));
1796 1 : if (!stats) {
1797 0 : SPDK_ERRLOG("Can't allocate memory for stats\n");
1798 0 : return -ENOMEM;
1799 : }
1800 1 : stats->trtype = SPDK_NVME_TRANSPORT_PCIE;
1801 1 : group = SPDK_CONTAINEROF(tgroup, struct nvme_pcie_poll_group, group);
1802 1 : memcpy(&stats->pcie, &group->stats, sizeof(group->stats));
1803 :
1804 1 : *_stats = stats;
1805 :
1806 1 : return 0;
1807 : }
1808 :
1809 : void
1810 1 : nvme_pcie_poll_group_free_stats(struct spdk_nvme_transport_poll_group *tgroup,
1811 : struct spdk_nvme_transport_poll_group_stat *stats)
1812 : {
1813 1 : free(stats);
1814 1 : }
1815 :
1816 2 : SPDK_TRACE_REGISTER_FN(nvme_pcie, "nvme_pcie", TRACE_GROUP_NVME_PCIE)
1817 : {
1818 0 : struct spdk_trace_tpoint_opts opts[] = {
1819 : {
1820 : "NVME_PCIE_SUBMIT", TRACE_NVME_PCIE_SUBMIT,
1821 : OWNER_NVME_PCIE_QP, OBJECT_NVME_PCIE_REQ, 1,
1822 : { { "ctx", SPDK_TRACE_ARG_TYPE_PTR, 8 },
1823 : { "cid", SPDK_TRACE_ARG_TYPE_INT, 4 },
1824 : { "opc", SPDK_TRACE_ARG_TYPE_INT, 4 },
1825 : { "dw10", SPDK_TRACE_ARG_TYPE_PTR, 4 },
1826 : { "dw11", SPDK_TRACE_ARG_TYPE_PTR, 4 },
1827 : { "dw12", SPDK_TRACE_ARG_TYPE_PTR, 4 }
1828 : }
1829 : },
1830 : {
1831 : "NVME_PCIE_COMPLETE", TRACE_NVME_PCIE_COMPLETE,
1832 : OWNER_NVME_PCIE_QP, OBJECT_NVME_PCIE_REQ, 0,
1833 : { { "ctx", SPDK_TRACE_ARG_TYPE_PTR, 8 },
1834 : { "cid", SPDK_TRACE_ARG_TYPE_INT, 4 },
1835 : { "cpl", SPDK_TRACE_ARG_TYPE_PTR, 4 }
1836 : }
1837 : },
1838 : };
1839 :
1840 0 : spdk_trace_register_object(OBJECT_NVME_PCIE_REQ, 'p');
1841 0 : spdk_trace_register_owner(OWNER_NVME_PCIE_QP, 'q');
1842 0 : spdk_trace_register_description_ext(opts, SPDK_COUNTOF(opts));
1843 0 : }
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