Line data Source code
1 : /* SPDX-License-Identifier: BSD-3-Clause
2 : * Copyright (C) 2015 Intel Corporation. All rights reserved.
3 : * Copyright (c) 2020, 2021 Mellanox Technologies LTD. All rights reserved.
4 : * Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
5 : */
6 :
7 : #ifndef __NVME_INTERNAL_H__
8 : #define __NVME_INTERNAL_H__
9 :
10 : #include "spdk/config.h"
11 : #include "spdk/likely.h"
12 : #include "spdk/stdinc.h"
13 :
14 : #include "spdk/nvme.h"
15 :
16 : #if defined(__i386__) || defined(__x86_64__)
17 : #include <x86intrin.h>
18 : #endif
19 :
20 : #include "spdk/queue.h"
21 : #include "spdk/barrier.h"
22 : #include "spdk/bit_array.h"
23 : #include "spdk/mmio.h"
24 : #include "spdk/pci_ids.h"
25 : #include "spdk/util.h"
26 : #include "spdk/memory.h"
27 : #include "spdk/nvme_intel.h"
28 : #include "spdk/nvmf_spec.h"
29 : #include "spdk/tree.h"
30 : #include "spdk/uuid.h"
31 :
32 : #include "spdk_internal/assert.h"
33 : #include "spdk/log.h"
34 :
35 : extern pid_t g_spdk_nvme_pid;
36 :
37 : extern struct spdk_nvme_transport_opts g_spdk_nvme_transport_opts;
38 :
39 : /*
40 : * Some Intel devices support vendor-unique read latency log page even
41 : * though the log page directory says otherwise.
42 : */
43 : #define NVME_INTEL_QUIRK_READ_LATENCY 0x1
44 :
45 : /*
46 : * Some Intel devices support vendor-unique write latency log page even
47 : * though the log page directory says otherwise.
48 : */
49 : #define NVME_INTEL_QUIRK_WRITE_LATENCY 0x2
50 :
51 : /*
52 : * The controller needs a delay before starts checking the device
53 : * readiness, which is done by reading the NVME_CSTS_RDY bit.
54 : */
55 : #define NVME_QUIRK_DELAY_BEFORE_CHK_RDY 0x4
56 :
57 : /*
58 : * The controller performs best when I/O is split on particular
59 : * LBA boundaries.
60 : */
61 : #define NVME_INTEL_QUIRK_STRIPING 0x8
62 :
63 : /*
64 : * The controller needs a delay after allocating an I/O queue pair
65 : * before it is ready to accept I/O commands.
66 : */
67 : #define NVME_QUIRK_DELAY_AFTER_QUEUE_ALLOC 0x10
68 :
69 : /*
70 : * Earlier NVMe devices do not indicate whether unmapped blocks
71 : * will read all zeroes or not. This define indicates that the
72 : * device does in fact read all zeroes after an unmap event
73 : */
74 : #define NVME_QUIRK_READ_ZERO_AFTER_DEALLOCATE 0x20
75 :
76 : /*
77 : * The controller doesn't handle Identify value others than 0 or 1 correctly.
78 : */
79 : #define NVME_QUIRK_IDENTIFY_CNS 0x40
80 :
81 : /*
82 : * The controller supports Open Channel command set if matching additional
83 : * condition, like the first byte (value 0x1) in the vendor specific
84 : * bits of the namespace identify structure is set.
85 : */
86 : #define NVME_QUIRK_OCSSD 0x80
87 :
88 : /*
89 : * The controller has an Intel vendor ID but does not support Intel vendor-specific
90 : * log pages. This is primarily for QEMU emulated SSDs which report an Intel vendor
91 : * ID but do not support these log pages.
92 : */
93 : #define NVME_INTEL_QUIRK_NO_LOG_PAGES 0x100
94 :
95 : /*
96 : * The controller does not set SHST_COMPLETE in a reasonable amount of time. This
97 : * is primarily seen in virtual VMWare NVMe SSDs. This quirk merely adds an additional
98 : * error message that on VMWare NVMe SSDs, the shutdown timeout may be expected.
99 : */
100 : #define NVME_QUIRK_SHST_COMPLETE 0x200
101 :
102 : /*
103 : * The controller requires an extra delay before starting the initialization process
104 : * during attach.
105 : */
106 : #define NVME_QUIRK_DELAY_BEFORE_INIT 0x400
107 :
108 : /*
109 : * Some SSDs exhibit poor performance with the default SPDK NVMe IO queue size.
110 : * This quirk will increase the default to 1024 which matches other operating
111 : * systems, at the cost of some extra memory usage. Users can still override
112 : * the increased default by changing the spdk_nvme_io_qpair_opts when allocating
113 : * a new queue pair.
114 : */
115 : #define NVME_QUIRK_MINIMUM_IO_QUEUE_SIZE 0x800
116 :
117 : /**
118 : * The maximum access width to PCI memory space is 8 Bytes, don't use AVX2 or
119 : * SSE instructions to optimize the memory access(memcpy or memset) larger than
120 : * 8 Bytes.
121 : */
122 : #define NVME_QUIRK_MAXIMUM_PCI_ACCESS_WIDTH 0x1000
123 :
124 : /**
125 : * The SSD does not support OPAL even through it sets the security bit in OACS.
126 : */
127 : #define NVME_QUIRK_OACS_SECURITY 0x2000
128 :
129 : /**
130 : * Intel P55XX SSDs can't support Dataset Management command with SGL format,
131 : * so use PRP with DSM command.
132 : */
133 : #define NVME_QUIRK_NO_SGL_FOR_DSM 0x4000
134 :
135 : /**
136 : * Maximum Data Transfer Size(MDTS) excludes interleaved metadata.
137 : */
138 : #define NVME_QUIRK_MDTS_EXCLUDE_MD 0x8000
139 :
140 : /**
141 : * Force not to use SGL even the controller report that it can
142 : * support it.
143 : */
144 : #define NVME_QUIRK_NOT_USE_SGL 0x10000
145 :
146 : /*
147 : * Some SSDs require the admin submission queue size to equate to an even
148 : * 4KiB multiple.
149 : */
150 : #define NVME_QUIRK_MINIMUM_ADMIN_QUEUE_SIZE 0x20000
151 :
152 : #define NVME_MAX_ASYNC_EVENTS (8)
153 :
154 : #define NVME_MAX_ADMIN_TIMEOUT_IN_SECS (30)
155 :
156 : /* Maximum log page size to fetch for AERs. */
157 : #define NVME_MAX_AER_LOG_SIZE (4096)
158 :
159 : /*
160 : * NVME_MAX_IO_QUEUES in nvme_spec.h defines the 64K spec-limit, but this
161 : * define specifies the maximum number of queues this driver will actually
162 : * try to configure, if available.
163 : */
164 : #define DEFAULT_MAX_IO_QUEUES (1024)
165 : #define DEFAULT_ADMIN_QUEUE_SIZE (32)
166 : #define DEFAULT_IO_QUEUE_SIZE (256)
167 : #define DEFAULT_IO_QUEUE_SIZE_FOR_QUIRK (1024) /* Matches Linux kernel driver */
168 :
169 : #define DEFAULT_IO_QUEUE_REQUESTS (512)
170 :
171 : #define SPDK_NVME_DEFAULT_RETRY_COUNT (4)
172 :
173 : #define SPDK_NVME_TRANSPORT_ACK_TIMEOUT_DISABLED (0)
174 : #define SPDK_NVME_DEFAULT_TRANSPORT_ACK_TIMEOUT SPDK_NVME_TRANSPORT_ACK_TIMEOUT_DISABLED
175 :
176 : #define SPDK_NVME_TRANSPORT_TOS_DISABLED (0)
177 :
178 : #define MIN_KEEP_ALIVE_TIMEOUT_IN_MS (10000)
179 :
180 : /* We want to fit submission and completion rings each in a single 2MB
181 : * hugepage to ensure physical address contiguity.
182 : */
183 : #define MAX_IO_QUEUE_ENTRIES (VALUE_2MB / spdk_max( \
184 : sizeof(struct spdk_nvme_cmd), \
185 : sizeof(struct spdk_nvme_cpl)))
186 :
187 : /* Default timeout for fabrics connect commands. */
188 : #ifdef DEBUG
189 : #define NVME_FABRIC_CONNECT_COMMAND_TIMEOUT 0
190 : #else
191 : /* 500 millisecond timeout. */
192 : #define NVME_FABRIC_CONNECT_COMMAND_TIMEOUT 500000
193 : #endif
194 :
195 : /* This value indicates that a read from a PCIe register is invalid. This can happen when a device is no longer present */
196 : #define SPDK_NVME_INVALID_REGISTER_VALUE 0xFFFFFFFFu
197 :
198 : enum nvme_payload_type {
199 : NVME_PAYLOAD_TYPE_INVALID = 0,
200 :
201 : /** nvme_request::u.payload.contig_buffer is valid for this request */
202 : NVME_PAYLOAD_TYPE_CONTIG,
203 :
204 : /** nvme_request::u.sgl is valid for this request */
205 : NVME_PAYLOAD_TYPE_SGL,
206 : };
207 :
208 : /** Boot partition write states */
209 : enum nvme_bp_write_state {
210 : SPDK_NVME_BP_WS_DOWNLOADING = 0x0,
211 : SPDK_NVME_BP_WS_DOWNLOADED = 0x1,
212 : SPDK_NVME_BP_WS_REPLACE = 0x2,
213 : SPDK_NVME_BP_WS_ACTIVATE = 0x3,
214 : };
215 :
216 : /**
217 : * Descriptor for a request data payload.
218 : */
219 : struct nvme_payload {
220 : /**
221 : * Functions for retrieving physical addresses for scattered payloads.
222 : */
223 : spdk_nvme_req_reset_sgl_cb reset_sgl_fn;
224 : spdk_nvme_req_next_sge_cb next_sge_fn;
225 :
226 : /**
227 : * Extended IO options passed by the user
228 : */
229 : struct spdk_nvme_ns_cmd_ext_io_opts *opts;
230 : /**
231 : * If reset_sgl_fn == NULL, this is a contig payload, and contig_or_cb_arg contains the
232 : * virtual memory address of a single virtually contiguous buffer.
233 : *
234 : * If reset_sgl_fn != NULL, this is a SGL payload, and contig_or_cb_arg contains the
235 : * cb_arg that will be passed to the SGL callback functions.
236 : */
237 : void *contig_or_cb_arg;
238 :
239 : /** Virtual memory address of a single virtually contiguous metadata buffer */
240 : void *md;
241 : };
242 :
243 : #define NVME_PAYLOAD_CONTIG(contig_, md_) \
244 : (struct nvme_payload) { \
245 : .reset_sgl_fn = NULL, \
246 : .next_sge_fn = NULL, \
247 : .contig_or_cb_arg = (contig_), \
248 : .md = (md_), \
249 : }
250 :
251 : #define NVME_PAYLOAD_SGL(reset_sgl_fn_, next_sge_fn_, cb_arg_, md_) \
252 : (struct nvme_payload) { \
253 : .reset_sgl_fn = (reset_sgl_fn_), \
254 : .next_sge_fn = (next_sge_fn_), \
255 : .contig_or_cb_arg = (cb_arg_), \
256 : .md = (md_), \
257 : }
258 :
259 : static inline enum nvme_payload_type
260 149 : nvme_payload_type(const struct nvme_payload *payload) {
261 149 : return payload->reset_sgl_fn ? NVME_PAYLOAD_TYPE_SGL : NVME_PAYLOAD_TYPE_CONTIG;
262 : }
263 :
264 : struct nvme_error_cmd {
265 : bool do_not_submit;
266 : uint64_t timeout_tsc;
267 : uint32_t err_count;
268 : uint8_t opc;
269 : struct spdk_nvme_status status;
270 : TAILQ_ENTRY(nvme_error_cmd) link;
271 : };
272 :
273 : struct nvme_request {
274 : struct spdk_nvme_cmd cmd;
275 :
276 : uint8_t retries;
277 :
278 : uint8_t timed_out : 1;
279 :
280 : /**
281 : * True if the request is in the queued_req list.
282 : */
283 : uint8_t queued : 1;
284 : uint8_t reserved : 6;
285 :
286 : /**
287 : * Number of children requests still outstanding for this
288 : * request which was split into multiple child requests.
289 : */
290 : uint16_t num_children;
291 :
292 : /**
293 : * Offset in bytes from the beginning of payload for this request.
294 : * This is used for I/O commands that are split into multiple requests.
295 : */
296 : uint32_t payload_offset;
297 : uint32_t md_offset;
298 :
299 : uint32_t payload_size;
300 :
301 : /**
302 : * Timeout ticks for error injection requests, can be extended in future
303 : * to support per-request timeout feature.
304 : */
305 : uint64_t timeout_tsc;
306 :
307 : /**
308 : * Data payload for this request's command.
309 : */
310 : struct nvme_payload payload;
311 :
312 : spdk_nvme_cmd_cb cb_fn;
313 : void *cb_arg;
314 : STAILQ_ENTRY(nvme_request) stailq;
315 :
316 : struct spdk_nvme_qpair *qpair;
317 :
318 : /*
319 : * The value of spdk_get_ticks() when the request was submitted to the hardware.
320 : * Only set if ctrlr->timeout_enabled is true.
321 : */
322 : uint64_t submit_tick;
323 :
324 : /**
325 : * The active admin request can be moved to a per process pending
326 : * list based on the saved pid to tell which process it belongs
327 : * to. The cpl saves the original completion information which
328 : * is used in the completion callback.
329 : * NOTE: these below two fields are only used for admin request.
330 : */
331 : pid_t pid;
332 : struct spdk_nvme_cpl cpl;
333 :
334 : uint32_t md_size;
335 :
336 : /**
337 : * The following members should not be reordered with members
338 : * above. These members are only needed when splitting
339 : * requests which is done rarely, and the driver is careful
340 : * to not touch the following fields until a split operation is
341 : * needed, to avoid touching an extra cacheline.
342 : */
343 :
344 : /**
345 : * Points to the outstanding child requests for a parent request.
346 : * Only valid if a request was split into multiple children
347 : * requests, and is not initialized for non-split requests.
348 : */
349 : TAILQ_HEAD(, nvme_request) children;
350 :
351 : /**
352 : * Linked-list pointers for a child request in its parent's list.
353 : */
354 : TAILQ_ENTRY(nvme_request) child_tailq;
355 :
356 : /**
357 : * Points to a parent request if part of a split request,
358 : * NULL otherwise.
359 : */
360 : struct nvme_request *parent;
361 :
362 : /**
363 : * Completion status for a parent request. Initialized to all 0's
364 : * (SUCCESS) before child requests are submitted. If a child
365 : * request completes with error, the error status is copied here,
366 : * to ensure that the parent request is also completed with error
367 : * status once all child requests are completed.
368 : */
369 : struct spdk_nvme_cpl parent_status;
370 :
371 : /**
372 : * The user_cb_fn and user_cb_arg fields are used for holding the original
373 : * callback data when using nvme_allocate_request_user_copy.
374 : */
375 : spdk_nvme_cmd_cb user_cb_fn;
376 : void *user_cb_arg;
377 : void *user_buffer;
378 :
379 : /** Sequence of accel operations associated with this request */
380 : void *accel_sequence;
381 : };
382 :
383 : struct nvme_completion_poll_status {
384 : struct spdk_nvme_cpl cpl;
385 : uint64_t timeout_tsc;
386 : /**
387 : * DMA buffer retained throughout the duration of the command. It'll be released
388 : * automatically if the command times out, otherwise the user is responsible for freeing it.
389 : */
390 : void *dma_data;
391 : bool done;
392 : /* This flag indicates that the request has been timed out and the memory
393 : must be freed in a completion callback */
394 : bool timed_out;
395 : };
396 :
397 : struct nvme_async_event_request {
398 : struct spdk_nvme_ctrlr *ctrlr;
399 : struct nvme_request *req;
400 : struct spdk_nvme_cpl cpl;
401 : };
402 :
403 : enum nvme_qpair_state {
404 : NVME_QPAIR_DISCONNECTED,
405 : NVME_QPAIR_DISCONNECTING,
406 : NVME_QPAIR_CONNECTING,
407 : NVME_QPAIR_CONNECTED,
408 : NVME_QPAIR_ENABLING,
409 : NVME_QPAIR_ENABLED,
410 : NVME_QPAIR_DESTROYING,
411 : };
412 :
413 : enum nvme_qpair_auth_state {
414 : NVME_QPAIR_AUTH_STATE_NEGOTIATE,
415 : NVME_QPAIR_AUTH_STATE_AWAIT_NEGOTIATE,
416 : NVME_QPAIR_AUTH_STATE_AWAIT_CHALLENGE,
417 : NVME_QPAIR_AUTH_STATE_AWAIT_REPLY,
418 : NVME_QPAIR_AUTH_STATE_AWAIT_SUCCESS1,
419 : NVME_QPAIR_AUTH_STATE_AWAIT_SUCCESS2,
420 : NVME_QPAIR_AUTH_STATE_AWAIT_FAILURE2,
421 : NVME_QPAIR_AUTH_STATE_DONE,
422 : };
423 :
424 : /* Authentication transaction required (authreq.atr) */
425 : #define NVME_QPAIR_AUTH_FLAG_ATR (1 << 0)
426 : /* Authentication and secure channel required (authreq.ascr) */
427 : #define NVME_QPAIR_AUTH_FLAG_ASCR (1 << 1)
428 :
429 : /* Maximum size of a digest */
430 : #define NVME_AUTH_DIGEST_MAX_SIZE 64
431 :
432 : struct nvme_auth {
433 : /* State of the authentication */
434 : enum nvme_qpair_auth_state state;
435 : /* Status of the authentication */
436 : int status;
437 : /* Transaction ID */
438 : uint16_t tid;
439 : /* Flags */
440 : uint32_t flags;
441 : /* Selected hash function */
442 : uint8_t hash;
443 : /* Buffer used for controller challenge */
444 : uint8_t challenge[NVME_AUTH_DIGEST_MAX_SIZE];
445 : /* User's auth cb fn/ctx */
446 : spdk_nvme_authenticate_cb cb_fn;
447 : void *cb_ctx;
448 : };
449 :
450 : struct spdk_nvme_qpair {
451 : struct spdk_nvme_ctrlr *ctrlr;
452 :
453 : uint16_t id;
454 :
455 : uint8_t qprio: 2;
456 :
457 : uint8_t state: 3;
458 :
459 : uint8_t async: 1;
460 :
461 : uint8_t is_new_qpair: 1;
462 :
463 : uint8_t abort_dnr: 1;
464 : /*
465 : * Members for handling IO qpair deletion inside of a completion context.
466 : * These are specifically defined as single bits, so that they do not
467 : * push this data structure out to another cacheline.
468 : */
469 : uint8_t in_completion_context: 1;
470 : uint8_t delete_after_completion_context: 1;
471 :
472 : /*
473 : * Set when no deletion notification is needed. For example, the process
474 : * which allocated this qpair exited unexpectedly.
475 : */
476 : uint8_t no_deletion_notification_needed: 1;
477 :
478 : uint8_t last_fuse: 2;
479 :
480 : uint8_t transport_failure_reason: 3;
481 : uint8_t last_transport_failure_reason: 3;
482 :
483 : /* The user is destroying qpair */
484 : uint8_t destroy_in_progress: 1;
485 :
486 : /* Number of IO outstanding at transport level */
487 : uint16_t queue_depth;
488 :
489 : enum spdk_nvme_transport_type trtype;
490 :
491 : uint32_t num_outstanding_reqs;
492 :
493 : /* request object used only for this qpair's FABRICS/CONNECT command (if needed) */
494 : struct nvme_request *reserved_req;
495 :
496 : STAILQ_HEAD(, nvme_request) free_req;
497 : STAILQ_HEAD(, nvme_request) queued_req;
498 :
499 : /* List entry for spdk_nvme_transport_poll_group::qpairs */
500 : STAILQ_ENTRY(spdk_nvme_qpair) poll_group_stailq;
501 :
502 : /** Commands opcode in this list will return error */
503 : TAILQ_HEAD(, nvme_error_cmd) err_cmd_head;
504 : /** Requests in this list will return error */
505 : STAILQ_HEAD(, nvme_request) err_req_head;
506 :
507 : struct spdk_nvme_ctrlr_process *active_proc;
508 :
509 : struct spdk_nvme_transport_poll_group *poll_group;
510 :
511 : void *poll_group_tailq_head;
512 :
513 : const struct spdk_nvme_transport *transport;
514 :
515 : /* Entries below here are not touched in the main I/O path. */
516 :
517 : struct nvme_completion_poll_status *poll_status;
518 :
519 : /* List entry for spdk_nvme_ctrlr::active_io_qpairs */
520 : TAILQ_ENTRY(spdk_nvme_qpair) tailq;
521 :
522 : /* List entry for spdk_nvme_ctrlr_process::allocated_io_qpairs */
523 : TAILQ_ENTRY(spdk_nvme_qpair) per_process_tailq;
524 :
525 : STAILQ_HEAD(, nvme_request) aborting_queued_req;
526 :
527 : void *req_buf;
528 :
529 : /* In-band authentication state */
530 : struct nvme_auth auth;
531 : };
532 :
533 : struct spdk_nvme_poll_group {
534 : void *ctx;
535 : struct spdk_nvme_accel_fn_table accel_fn_table;
536 : STAILQ_HEAD(, spdk_nvme_transport_poll_group) tgroups;
537 : bool in_process_completions;
538 : };
539 :
540 : struct spdk_nvme_transport_poll_group {
541 : struct spdk_nvme_poll_group *group;
542 : const struct spdk_nvme_transport *transport;
543 : STAILQ_HEAD(, spdk_nvme_qpair) connected_qpairs;
544 : STAILQ_HEAD(, spdk_nvme_qpair) disconnected_qpairs;
545 : STAILQ_ENTRY(spdk_nvme_transport_poll_group) link;
546 : uint32_t num_connected_qpairs;
547 : };
548 :
549 : struct spdk_nvme_ns {
550 : struct spdk_nvme_ctrlr *ctrlr;
551 : uint32_t sector_size;
552 :
553 : /*
554 : * Size of data transferred as part of each block,
555 : * including metadata if FLBAS indicates the metadata is transferred
556 : * as part of the data buffer at the end of each LBA.
557 : */
558 : uint32_t extended_lba_size;
559 :
560 : uint32_t md_size;
561 : uint32_t pi_type;
562 : uint32_t pi_format;
563 : uint32_t sectors_per_max_io;
564 : uint32_t sectors_per_max_io_no_md;
565 : uint32_t sectors_per_stripe;
566 : uint32_t id;
567 : uint16_t flags;
568 : bool active;
569 :
570 : /* Command Set Identifier */
571 : enum spdk_nvme_csi csi;
572 :
573 : /* Namespace Identification Descriptor List (CNS = 03h) */
574 : uint8_t id_desc_list[4096];
575 :
576 : uint32_t ana_group_id;
577 : enum spdk_nvme_ana_state ana_state;
578 :
579 : /* Identify Namespace data. */
580 : struct spdk_nvme_ns_data nsdata;
581 :
582 : /* Zoned Namespace Command Set Specific Identify Namespace data. */
583 : struct spdk_nvme_zns_ns_data *nsdata_zns;
584 :
585 : struct spdk_nvme_nvm_ns_data *nsdata_nvm;
586 :
587 : RB_ENTRY(spdk_nvme_ns) node;
588 : };
589 :
590 : #define CTRLR_STRING(ctrlr) \
591 : (spdk_nvme_trtype_is_fabrics(ctrlr->trid.trtype) ? \
592 : ctrlr->trid.subnqn : ctrlr->trid.traddr)
593 :
594 : #define NVME_CTRLR_ERRLOG(ctrlr, format, ...) \
595 : SPDK_ERRLOG("[%s, %u] " format, CTRLR_STRING(ctrlr), ctrlr->cntlid, ##__VA_ARGS__);
596 :
597 : #define NVME_CTRLR_WARNLOG(ctrlr, format, ...) \
598 : SPDK_WARNLOG("[%s, %u] " format, CTRLR_STRING(ctrlr), ctrlr->cntlid, ##__VA_ARGS__);
599 :
600 : #define NVME_CTRLR_NOTICELOG(ctrlr, format, ...) \
601 : SPDK_NOTICELOG("[%s, %u] " format, CTRLR_STRING(ctrlr), ctrlr->cntlid, ##__VA_ARGS__);
602 :
603 : #define NVME_CTRLR_INFOLOG(ctrlr, format, ...) \
604 : SPDK_INFOLOG(nvme, "[%s, %u] " format, CTRLR_STRING(ctrlr), ctrlr->cntlid, ##__VA_ARGS__);
605 :
606 : #ifdef DEBUG
607 : #define NVME_CTRLR_DEBUGLOG(ctrlr, format, ...) \
608 : SPDK_DEBUGLOG(nvme, "[%s, %u] " format, CTRLR_STRING(ctrlr), ctrlr->cntlid, ##__VA_ARGS__);
609 : #else
610 : #define NVME_CTRLR_DEBUGLOG(ctrlr, ...) do { } while (0)
611 : #endif
612 :
613 : /**
614 : * State of struct spdk_nvme_ctrlr (in particular, during initialization).
615 : */
616 : enum nvme_ctrlr_state {
617 : /**
618 : * Wait before initializing the controller.
619 : */
620 : NVME_CTRLR_STATE_INIT_DELAY,
621 :
622 : /**
623 : * Connect the admin queue.
624 : */
625 : NVME_CTRLR_STATE_CONNECT_ADMINQ,
626 :
627 : /**
628 : * Controller has not started initialized yet.
629 : */
630 : NVME_CTRLR_STATE_INIT = NVME_CTRLR_STATE_CONNECT_ADMINQ,
631 :
632 : /**
633 : * Waiting for admin queue to connect.
634 : */
635 : NVME_CTRLR_STATE_WAIT_FOR_CONNECT_ADMINQ,
636 :
637 : /**
638 : * Read Version (VS) register.
639 : */
640 : NVME_CTRLR_STATE_READ_VS,
641 :
642 : /**
643 : * Waiting for Version (VS) register to be read.
644 : */
645 : NVME_CTRLR_STATE_READ_VS_WAIT_FOR_VS,
646 :
647 : /**
648 : * Read Capabilities (CAP) register.
649 : */
650 : NVME_CTRLR_STATE_READ_CAP,
651 :
652 : /**
653 : * Waiting for Capabilities (CAP) register to be read.
654 : */
655 : NVME_CTRLR_STATE_READ_CAP_WAIT_FOR_CAP,
656 :
657 : /**
658 : * Check EN to prepare for controller initialization.
659 : */
660 : NVME_CTRLR_STATE_CHECK_EN,
661 :
662 : /**
663 : * Waiting for CC to be read as part of EN check.
664 : */
665 : NVME_CTRLR_STATE_CHECK_EN_WAIT_FOR_CC,
666 :
667 : /**
668 : * Waiting for CSTS.RDY to transition from 0 to 1 so that CC.EN may be set to 0.
669 : */
670 : NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1,
671 :
672 : /**
673 : * Waiting for CSTS register to be read as part of waiting for CSTS.RDY = 1.
674 : */
675 : NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_1_WAIT_FOR_CSTS,
676 :
677 : /**
678 : * Disabling the controller by setting CC.EN to 0.
679 : */
680 : NVME_CTRLR_STATE_SET_EN_0,
681 :
682 : /**
683 : * Waiting for the CC register to be read as part of disabling the controller.
684 : */
685 : NVME_CTRLR_STATE_SET_EN_0_WAIT_FOR_CC,
686 :
687 : /**
688 : * Waiting for CSTS.RDY to transition from 1 to 0 so that CC.EN may be set to 1.
689 : */
690 : NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0,
691 :
692 : /**
693 : * Waiting for CSTS register to be read as part of waiting for CSTS.RDY = 0.
694 : */
695 : NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0_WAIT_FOR_CSTS,
696 :
697 : /**
698 : * The controller is disabled. (CC.EN and CSTS.RDY are 0.)
699 : */
700 : NVME_CTRLR_STATE_DISABLED,
701 :
702 : /**
703 : * Enable the controller by writing CC.EN to 1
704 : */
705 : NVME_CTRLR_STATE_ENABLE,
706 :
707 : /**
708 : * Waiting for CC register to be written as part of enabling the controller.
709 : */
710 : NVME_CTRLR_STATE_ENABLE_WAIT_FOR_CC,
711 :
712 : /**
713 : * Waiting for CSTS.RDY to transition from 0 to 1 after enabling the controller.
714 : */
715 : NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1,
716 :
717 : /**
718 : * Waiting for CSTS register to be read as part of waiting for CSTS.RDY = 1.
719 : */
720 : NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1_WAIT_FOR_CSTS,
721 :
722 : /**
723 : * Reset the Admin queue of the controller.
724 : */
725 : NVME_CTRLR_STATE_RESET_ADMIN_QUEUE,
726 :
727 : /**
728 : * Identify Controller command will be sent to then controller.
729 : */
730 : NVME_CTRLR_STATE_IDENTIFY,
731 :
732 : /**
733 : * Waiting for Identify Controller command be completed.
734 : */
735 : NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY,
736 :
737 : /**
738 : * Configure AER of the controller.
739 : */
740 : NVME_CTRLR_STATE_CONFIGURE_AER,
741 :
742 : /**
743 : * Waiting for the Configure AER to be completed.
744 : */
745 : NVME_CTRLR_STATE_WAIT_FOR_CONFIGURE_AER,
746 :
747 : /**
748 : * Set Keep Alive Timeout of the controller.
749 : */
750 : NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT,
751 :
752 : /**
753 : * Waiting for Set Keep Alive Timeout to be completed.
754 : */
755 : NVME_CTRLR_STATE_WAIT_FOR_KEEP_ALIVE_TIMEOUT,
756 :
757 : /**
758 : * Get Identify I/O Command Set Specific Controller data structure.
759 : */
760 : NVME_CTRLR_STATE_IDENTIFY_IOCS_SPECIFIC,
761 :
762 : /**
763 : * Waiting for Identify I/O Command Set Specific Controller command to be completed.
764 : */
765 : NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_IOCS_SPECIFIC,
766 :
767 : /**
768 : * Get Commands Supported and Effects log page for the Zoned Namespace Command Set.
769 : */
770 : NVME_CTRLR_STATE_GET_ZNS_CMD_EFFECTS_LOG,
771 :
772 : /**
773 : * Waiting for the Get Log Page command to be completed.
774 : */
775 : NVME_CTRLR_STATE_WAIT_FOR_GET_ZNS_CMD_EFFECTS_LOG,
776 :
777 : /**
778 : * Set Number of Queues of the controller.
779 : */
780 : NVME_CTRLR_STATE_SET_NUM_QUEUES,
781 :
782 : /**
783 : * Waiting for Set Num of Queues command to be completed.
784 : */
785 : NVME_CTRLR_STATE_WAIT_FOR_SET_NUM_QUEUES,
786 :
787 : /**
788 : * Get active Namespace list of the controller.
789 : */
790 : NVME_CTRLR_STATE_IDENTIFY_ACTIVE_NS,
791 :
792 : /**
793 : * Waiting for the Identify Active Namespace commands to be completed.
794 : */
795 : NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ACTIVE_NS,
796 :
797 : /**
798 : * Get Identify Namespace Data structure for each NS.
799 : */
800 : NVME_CTRLR_STATE_IDENTIFY_NS,
801 :
802 : /**
803 : * Waiting for the Identify Namespace commands to be completed.
804 : */
805 : NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS,
806 :
807 : /**
808 : * Get Identify Namespace Identification Descriptors.
809 : */
810 : NVME_CTRLR_STATE_IDENTIFY_ID_DESCS,
811 :
812 : /**
813 : * Get Identify I/O Command Set Specific Namespace data structure for each NS.
814 : */
815 : NVME_CTRLR_STATE_IDENTIFY_NS_IOCS_SPECIFIC,
816 :
817 : /**
818 : * Waiting for the Identify I/O Command Set Specific Namespace commands to be completed.
819 : */
820 : NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_NS_IOCS_SPECIFIC,
821 :
822 : /**
823 : * Waiting for the Identify Namespace Identification
824 : * Descriptors to be completed.
825 : */
826 : NVME_CTRLR_STATE_WAIT_FOR_IDENTIFY_ID_DESCS,
827 :
828 : /**
829 : * Set supported log pages of the controller.
830 : */
831 : NVME_CTRLR_STATE_SET_SUPPORTED_LOG_PAGES,
832 :
833 : /**
834 : * Set supported log pages of INTEL controller.
835 : */
836 : NVME_CTRLR_STATE_SET_SUPPORTED_INTEL_LOG_PAGES,
837 :
838 : /**
839 : * Waiting for supported log pages of INTEL controller.
840 : */
841 : NVME_CTRLR_STATE_WAIT_FOR_SUPPORTED_INTEL_LOG_PAGES,
842 :
843 : /**
844 : * Set supported features of the controller.
845 : */
846 : NVME_CTRLR_STATE_SET_SUPPORTED_FEATURES,
847 :
848 : /**
849 : * Set the Host Behavior Support feature of the controller.
850 : */
851 : NVME_CTRLR_STATE_SET_HOST_FEATURE,
852 :
853 : /**
854 : * Waiting for the Host Behavior Support feature of the controller.
855 : */
856 : NVME_CTRLR_STATE_WAIT_FOR_SET_HOST_FEATURE,
857 :
858 : /**
859 : * Set Doorbell Buffer Config of the controller.
860 : */
861 : NVME_CTRLR_STATE_SET_DB_BUF_CFG,
862 :
863 : /**
864 : * Waiting for Doorbell Buffer Config to be completed.
865 : */
866 : NVME_CTRLR_STATE_WAIT_FOR_DB_BUF_CFG,
867 :
868 : /**
869 : * Set Host ID of the controller.
870 : */
871 : NVME_CTRLR_STATE_SET_HOST_ID,
872 :
873 : /**
874 : * Waiting for Set Host ID to be completed.
875 : */
876 : NVME_CTRLR_STATE_WAIT_FOR_HOST_ID,
877 :
878 : /**
879 : * Let transport layer do its part of initialization.
880 : */
881 : NVME_CTRLR_STATE_TRANSPORT_READY,
882 :
883 : /**
884 : * Controller initialization has completed and the controller is ready.
885 : */
886 : NVME_CTRLR_STATE_READY,
887 :
888 : /**
889 : * Controller initialization has an error.
890 : */
891 : NVME_CTRLR_STATE_ERROR,
892 :
893 : /**
894 : * Admin qpair was disconnected, controller needs to be re-initialized
895 : */
896 : NVME_CTRLR_STATE_DISCONNECTED,
897 : };
898 :
899 : #define NVME_TIMEOUT_INFINITE 0
900 : #define NVME_TIMEOUT_KEEP_EXISTING UINT64_MAX
901 :
902 : struct spdk_nvme_ctrlr_aer_completion {
903 : struct spdk_nvme_cpl cpl;
904 : STAILQ_ENTRY(spdk_nvme_ctrlr_aer_completion) link;
905 : };
906 :
907 : /*
908 : * Used to track properties for all processes accessing the controller.
909 : */
910 : struct spdk_nvme_ctrlr_process {
911 : /** Whether it is the primary process */
912 : bool is_primary;
913 :
914 : /** Process ID */
915 : pid_t pid;
916 :
917 : /** Active admin requests to be completed */
918 : STAILQ_HEAD(, nvme_request) active_reqs;
919 :
920 : TAILQ_ENTRY(spdk_nvme_ctrlr_process) tailq;
921 :
922 : /** Per process PCI device handle */
923 : struct spdk_pci_device *devhandle;
924 :
925 : /** Reference to track the number of attachment to this controller. */
926 : int ref;
927 :
928 : /** Allocated IO qpairs */
929 : TAILQ_HEAD(, spdk_nvme_qpair) allocated_io_qpairs;
930 :
931 : spdk_nvme_aer_cb aer_cb_fn;
932 : void *aer_cb_arg;
933 :
934 : /**
935 : * A function pointer to timeout callback function
936 : */
937 : spdk_nvme_timeout_cb timeout_cb_fn;
938 : void *timeout_cb_arg;
939 : /** separate timeout values for io vs. admin reqs */
940 : uint64_t timeout_io_ticks;
941 : uint64_t timeout_admin_ticks;
942 :
943 : /** List to publish AENs to all procs in multiprocess setup */
944 : STAILQ_HEAD(, spdk_nvme_ctrlr_aer_completion) async_events;
945 : };
946 :
947 : struct nvme_register_completion {
948 : struct spdk_nvme_cpl cpl;
949 : uint64_t value;
950 : spdk_nvme_reg_cb cb_fn;
951 : void *cb_ctx;
952 : STAILQ_ENTRY(nvme_register_completion) stailq;
953 : pid_t pid;
954 : };
955 :
956 : struct spdk_nvme_ctrlr {
957 : /* Hot data (accessed in I/O path) starts here. */
958 :
959 : /* Tree of namespaces */
960 : RB_HEAD(nvme_ns_tree, spdk_nvme_ns) ns;
961 :
962 : /* The number of active namespaces */
963 : uint32_t active_ns_count;
964 :
965 : bool is_removed;
966 :
967 : bool is_resetting;
968 :
969 : bool is_failed;
970 :
971 : bool is_destructed;
972 :
973 : bool timeout_enabled;
974 :
975 : /* The application is preparing to reset the controller. Transports
976 : * can use this to skip unnecessary parts of the qpair deletion process
977 : * for example, like the DELETE_SQ/CQ commands.
978 : */
979 : bool prepare_for_reset;
980 :
981 : bool is_disconnecting;
982 :
983 : bool needs_io_msg_update;
984 :
985 : uint16_t max_sges;
986 :
987 : uint16_t cntlid;
988 :
989 : /** Controller support flags */
990 : uint64_t flags;
991 :
992 : /** NVMEoF in-capsule data size in bytes */
993 : uint32_t ioccsz_bytes;
994 :
995 : /** NVMEoF in-capsule data offset in 16 byte units */
996 : uint16_t icdoff;
997 :
998 : /* Cold data (not accessed in normal I/O path) is after this point. */
999 :
1000 : struct spdk_nvme_transport_id trid;
1001 :
1002 : struct {
1003 : /** Is numa.id valid? Ensures numa.id == 0 is interpreted correctly. */
1004 : uint32_t id_valid : 1;
1005 : int32_t id : 31;
1006 : } numa;
1007 :
1008 : union spdk_nvme_cap_register cap;
1009 : union spdk_nvme_vs_register vs;
1010 :
1011 : int state;
1012 : uint64_t state_timeout_tsc;
1013 :
1014 : uint64_t next_keep_alive_tick;
1015 : uint64_t keep_alive_interval_ticks;
1016 :
1017 : TAILQ_ENTRY(spdk_nvme_ctrlr) tailq;
1018 :
1019 : /** All the log pages supported */
1020 : bool log_page_supported[256];
1021 :
1022 : /** All the features supported */
1023 : bool feature_supported[256];
1024 :
1025 : /** maximum i/o size in bytes */
1026 : uint32_t max_xfer_size;
1027 :
1028 : /** minimum page size supported by this controller in bytes */
1029 : uint32_t min_page_size;
1030 :
1031 : /** selected memory page size for this controller in bytes */
1032 : uint32_t page_size;
1033 :
1034 : uint32_t num_aers;
1035 : struct nvme_async_event_request aer[NVME_MAX_ASYNC_EVENTS];
1036 :
1037 : /** guards access to the controller itself, including admin queues */
1038 : pthread_mutex_t ctrlr_lock;
1039 :
1040 : struct spdk_nvme_qpair *adminq;
1041 :
1042 : /** shadow doorbell buffer */
1043 : uint32_t *shadow_doorbell;
1044 : /** eventidx buffer */
1045 : uint32_t *eventidx;
1046 :
1047 : /**
1048 : * Identify Controller data.
1049 : */
1050 : struct spdk_nvme_ctrlr_data cdata;
1051 :
1052 : /**
1053 : * Zoned Namespace Command Set Specific Identify Controller data.
1054 : */
1055 : struct spdk_nvme_zns_ctrlr_data *cdata_zns;
1056 :
1057 : struct spdk_bit_array *free_io_qids;
1058 : TAILQ_HEAD(, spdk_nvme_qpair) active_io_qpairs;
1059 :
1060 : struct spdk_nvme_ctrlr_opts opts;
1061 :
1062 : uint64_t quirks;
1063 :
1064 : /* Extra sleep time during controller initialization */
1065 : uint64_t sleep_timeout_tsc;
1066 :
1067 : /** Track all the processes manage this controller */
1068 : TAILQ_HEAD(, spdk_nvme_ctrlr_process) active_procs;
1069 :
1070 :
1071 : STAILQ_HEAD(, nvme_request) queued_aborts;
1072 : uint32_t outstanding_aborts;
1073 :
1074 : uint32_t lock_depth;
1075 :
1076 : /* CB to notify the user when the ctrlr is removed/failed. */
1077 : spdk_nvme_remove_cb remove_cb;
1078 : void *cb_ctx;
1079 :
1080 : struct spdk_nvme_qpair *external_io_msgs_qpair;
1081 : pthread_mutex_t external_io_msgs_lock;
1082 : struct spdk_ring *external_io_msgs;
1083 :
1084 : STAILQ_HEAD(, nvme_io_msg_producer) io_producers;
1085 :
1086 : struct spdk_nvme_ana_page *ana_log_page;
1087 : struct spdk_nvme_ana_group_descriptor *copied_ana_desc;
1088 : uint32_t ana_log_page_size;
1089 :
1090 : /* scratchpad pointer that can be used to send data between two NVME_CTRLR_STATEs */
1091 : void *tmp_ptr;
1092 :
1093 : /* maximum zone append size in bytes */
1094 : uint32_t max_zone_append_size;
1095 :
1096 : /* PMR size in bytes */
1097 : uint64_t pmr_size;
1098 :
1099 : /* Boot Partition Info */
1100 : enum nvme_bp_write_state bp_ws;
1101 : uint32_t bpid;
1102 : spdk_nvme_cmd_cb bp_write_cb_fn;
1103 : void *bp_write_cb_arg;
1104 :
1105 : /* Firmware Download */
1106 : void *fw_payload;
1107 : unsigned int fw_size_remaining;
1108 : unsigned int fw_offset;
1109 : unsigned int fw_transfer_size;
1110 :
1111 : /* Completed register operations */
1112 : STAILQ_HEAD(, nvme_register_completion) register_operations;
1113 :
1114 : union spdk_nvme_cc_register process_init_cc;
1115 :
1116 : /* Authentication transaction ID */
1117 : uint16_t auth_tid;
1118 : /* Authentication sequence number */
1119 : uint32_t auth_seqnum;
1120 : };
1121 :
1122 : struct spdk_nvme_probe_ctx {
1123 : struct spdk_nvme_transport_id trid;
1124 : const struct spdk_nvme_ctrlr_opts *opts;
1125 : void *cb_ctx;
1126 : spdk_nvme_probe_cb probe_cb;
1127 : spdk_nvme_attach_cb attach_cb;
1128 : spdk_nvme_attach_fail_cb attach_fail_cb;
1129 : spdk_nvme_remove_cb remove_cb;
1130 : TAILQ_HEAD(, spdk_nvme_ctrlr) init_ctrlrs;
1131 : };
1132 :
1133 : typedef void (*nvme_ctrlr_detach_cb)(struct spdk_nvme_ctrlr *ctrlr);
1134 :
1135 : enum nvme_ctrlr_detach_state {
1136 : NVME_CTRLR_DETACH_SET_CC,
1137 : NVME_CTRLR_DETACH_CHECK_CSTS,
1138 : NVME_CTRLR_DETACH_GET_CSTS,
1139 : NVME_CTRLR_DETACH_GET_CSTS_DONE,
1140 : };
1141 :
1142 : struct nvme_ctrlr_detach_ctx {
1143 : struct spdk_nvme_ctrlr *ctrlr;
1144 : nvme_ctrlr_detach_cb cb_fn;
1145 : uint64_t shutdown_start_tsc;
1146 : uint32_t shutdown_timeout_ms;
1147 : bool shutdown_complete;
1148 : enum nvme_ctrlr_detach_state state;
1149 : union spdk_nvme_csts_register csts;
1150 : TAILQ_ENTRY(nvme_ctrlr_detach_ctx) link;
1151 : };
1152 :
1153 : struct spdk_nvme_detach_ctx {
1154 : TAILQ_HEAD(, nvme_ctrlr_detach_ctx) head;
1155 : };
1156 :
1157 : struct nvme_driver {
1158 : pthread_mutex_t lock;
1159 :
1160 : /** Multi-process shared attached controller list */
1161 : TAILQ_HEAD(, spdk_nvme_ctrlr) shared_attached_ctrlrs;
1162 :
1163 : bool initialized;
1164 : struct spdk_uuid default_extended_host_id;
1165 :
1166 : /** netlink socket fd for hotplug messages */
1167 : int hotplug_fd;
1168 : };
1169 :
1170 : #define nvme_ns_cmd_get_ext_io_opt(opts, field, defval) \
1171 : ((opts) != NULL && offsetof(struct spdk_nvme_ns_cmd_ext_io_opts, field) + \
1172 : sizeof((opts)->field) <= (opts)->size ? (opts)->field : (defval))
1173 :
1174 : extern struct nvme_driver *g_spdk_nvme_driver;
1175 :
1176 : int nvme_driver_init(void);
1177 :
1178 : #define nvme_delay usleep
1179 :
1180 : static inline bool
1181 70 : nvme_qpair_is_admin_queue(struct spdk_nvme_qpair *qpair)
1182 : {
1183 70 : return qpair->id == 0;
1184 : }
1185 :
1186 : static inline bool
1187 : nvme_qpair_is_io_queue(struct spdk_nvme_qpair *qpair)
1188 : {
1189 : return qpair->id != 0;
1190 : }
1191 :
1192 : static inline int
1193 12677 : nvme_robust_mutex_lock(pthread_mutex_t *mtx)
1194 : {
1195 12677 : int rc = pthread_mutex_lock(mtx);
1196 :
1197 : #ifndef __FreeBSD__
1198 12677 : if (rc == EOWNERDEAD) {
1199 0 : rc = pthread_mutex_consistent(mtx);
1200 : }
1201 : #endif
1202 :
1203 12677 : return rc;
1204 : }
1205 :
1206 : static inline int
1207 12609 : nvme_ctrlr_lock(struct spdk_nvme_ctrlr *ctrlr)
1208 : {
1209 : int rc;
1210 :
1211 12609 : rc = nvme_robust_mutex_lock(&ctrlr->ctrlr_lock);
1212 12609 : ctrlr->lock_depth++;
1213 12609 : return rc;
1214 : }
1215 :
1216 : static inline int
1217 12675 : nvme_robust_mutex_unlock(pthread_mutex_t *mtx)
1218 : {
1219 12675 : return pthread_mutex_unlock(mtx);
1220 : }
1221 :
1222 : static inline int
1223 12607 : nvme_ctrlr_unlock(struct spdk_nvme_ctrlr *ctrlr)
1224 : {
1225 12607 : ctrlr->lock_depth--;
1226 12607 : return nvme_robust_mutex_unlock(&ctrlr->ctrlr_lock);
1227 : }
1228 :
1229 : /* Poll group management functions. */
1230 : int nvme_poll_group_connect_qpair(struct spdk_nvme_qpair *qpair);
1231 : int nvme_poll_group_disconnect_qpair(struct spdk_nvme_qpair *qpair);
1232 :
1233 : /* Admin functions */
1234 : int nvme_ctrlr_cmd_identify(struct spdk_nvme_ctrlr *ctrlr,
1235 : uint8_t cns, uint16_t cntid, uint32_t nsid,
1236 : uint8_t csi, void *payload, size_t payload_size,
1237 : spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1238 : int nvme_ctrlr_cmd_set_num_queues(struct spdk_nvme_ctrlr *ctrlr,
1239 : uint32_t num_queues, spdk_nvme_cmd_cb cb_fn,
1240 : void *cb_arg);
1241 : int nvme_ctrlr_cmd_get_num_queues(struct spdk_nvme_ctrlr *ctrlr,
1242 : spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1243 : int nvme_ctrlr_cmd_set_async_event_config(struct spdk_nvme_ctrlr *ctrlr,
1244 : union spdk_nvme_feat_async_event_configuration config,
1245 : spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1246 : int nvme_ctrlr_cmd_set_host_id(struct spdk_nvme_ctrlr *ctrlr, void *host_id, uint32_t host_id_size,
1247 : spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1248 : int nvme_ctrlr_cmd_attach_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid,
1249 : struct spdk_nvme_ctrlr_list *payload, spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1250 : int nvme_ctrlr_cmd_detach_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid,
1251 : struct spdk_nvme_ctrlr_list *payload, spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1252 : int nvme_ctrlr_cmd_create_ns(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_ns_data *payload,
1253 : spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1254 : int nvme_ctrlr_cmd_doorbell_buffer_config(struct spdk_nvme_ctrlr *ctrlr,
1255 : uint64_t prp1, uint64_t prp2,
1256 : spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1257 : int nvme_ctrlr_cmd_delete_ns(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid, spdk_nvme_cmd_cb cb_fn,
1258 : void *cb_arg);
1259 : int nvme_ctrlr_cmd_format(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid,
1260 : struct spdk_nvme_format *format, spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1261 : int nvme_ctrlr_cmd_fw_commit(struct spdk_nvme_ctrlr *ctrlr,
1262 : const struct spdk_nvme_fw_commit *fw_commit,
1263 : spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1264 : int nvme_ctrlr_cmd_fw_image_download(struct spdk_nvme_ctrlr *ctrlr,
1265 : uint32_t size, uint32_t offset, void *payload,
1266 : spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1267 : int nvme_ctrlr_cmd_sanitize(struct spdk_nvme_ctrlr *ctrlr, uint32_t nsid,
1268 : struct spdk_nvme_sanitize *sanitize, uint32_t cdw11,
1269 : spdk_nvme_cmd_cb cb_fn, void *cb_arg);
1270 : void nvme_completion_poll_cb(void *arg, const struct spdk_nvme_cpl *cpl);
1271 : int nvme_wait_for_completion(struct spdk_nvme_qpair *qpair,
1272 : struct nvme_completion_poll_status *status);
1273 : int nvme_wait_for_completion_robust_lock(struct spdk_nvme_qpair *qpair,
1274 : struct nvme_completion_poll_status *status,
1275 : pthread_mutex_t *robust_mutex);
1276 : int nvme_wait_for_completion_timeout(struct spdk_nvme_qpair *qpair,
1277 : struct nvme_completion_poll_status *status,
1278 : uint64_t timeout_in_usecs);
1279 : int nvme_wait_for_completion_robust_lock_timeout(struct spdk_nvme_qpair *qpair,
1280 : struct nvme_completion_poll_status *status,
1281 : pthread_mutex_t *robust_mutex,
1282 : uint64_t timeout_in_usecs);
1283 : int nvme_wait_for_completion_robust_lock_timeout_poll(struct spdk_nvme_qpair *qpair,
1284 : struct nvme_completion_poll_status *status,
1285 : pthread_mutex_t *robust_mutex);
1286 :
1287 : struct spdk_nvme_ctrlr_process *nvme_ctrlr_get_process(struct spdk_nvme_ctrlr *ctrlr,
1288 : pid_t pid);
1289 : struct spdk_nvme_ctrlr_process *nvme_ctrlr_get_current_process(struct spdk_nvme_ctrlr *ctrlr);
1290 : int nvme_ctrlr_add_process(struct spdk_nvme_ctrlr *ctrlr, void *devhandle);
1291 : void nvme_ctrlr_free_processes(struct spdk_nvme_ctrlr *ctrlr);
1292 : struct spdk_pci_device *nvme_ctrlr_proc_get_devhandle(struct spdk_nvme_ctrlr *ctrlr);
1293 :
1294 : int nvme_ctrlr_probe(const struct spdk_nvme_transport_id *trid,
1295 : struct spdk_nvme_probe_ctx *probe_ctx, void *devhandle);
1296 :
1297 : int nvme_ctrlr_construct(struct spdk_nvme_ctrlr *ctrlr);
1298 : void nvme_ctrlr_destruct_finish(struct spdk_nvme_ctrlr *ctrlr);
1299 : void nvme_ctrlr_destruct(struct spdk_nvme_ctrlr *ctrlr);
1300 : void nvme_ctrlr_destruct_async(struct spdk_nvme_ctrlr *ctrlr,
1301 : struct nvme_ctrlr_detach_ctx *ctx);
1302 : int nvme_ctrlr_destruct_poll_async(struct spdk_nvme_ctrlr *ctrlr,
1303 : struct nvme_ctrlr_detach_ctx *ctx);
1304 : void nvme_ctrlr_fail(struct spdk_nvme_ctrlr *ctrlr, bool hot_remove);
1305 : int nvme_ctrlr_process_init(struct spdk_nvme_ctrlr *ctrlr);
1306 : void nvme_ctrlr_disable(struct spdk_nvme_ctrlr *ctrlr);
1307 : int nvme_ctrlr_disable_poll(struct spdk_nvme_ctrlr *ctrlr);
1308 : void nvme_ctrlr_connected(struct spdk_nvme_probe_ctx *probe_ctx,
1309 : struct spdk_nvme_ctrlr *ctrlr);
1310 :
1311 : int nvme_ctrlr_submit_admin_request(struct spdk_nvme_ctrlr *ctrlr,
1312 : struct nvme_request *req);
1313 : int nvme_ctrlr_get_cap(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_cap_register *cap);
1314 : int nvme_ctrlr_get_vs(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_vs_register *vs);
1315 : int nvme_ctrlr_get_cmbsz(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_cmbsz_register *cmbsz);
1316 : int nvme_ctrlr_get_pmrcap(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_pmrcap_register *pmrcap);
1317 : int nvme_ctrlr_get_bpinfo(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_bpinfo_register *bpinfo);
1318 : int nvme_ctrlr_set_bprsel(struct spdk_nvme_ctrlr *ctrlr, union spdk_nvme_bprsel_register *bprsel);
1319 : int nvme_ctrlr_set_bpmbl(struct spdk_nvme_ctrlr *ctrlr, uint64_t bpmbl_value);
1320 : bool nvme_ctrlr_multi_iocs_enabled(struct spdk_nvme_ctrlr *ctrlr);
1321 : void nvme_ctrlr_disconnect_qpair(struct spdk_nvme_qpair *qpair);
1322 : void nvme_ctrlr_abort_queued_aborts(struct spdk_nvme_ctrlr *ctrlr);
1323 : int nvme_qpair_init(struct spdk_nvme_qpair *qpair, uint16_t id,
1324 : struct spdk_nvme_ctrlr *ctrlr,
1325 : enum spdk_nvme_qprio qprio,
1326 : uint32_t num_requests, bool async);
1327 : void nvme_qpair_deinit(struct spdk_nvme_qpair *qpair);
1328 : void nvme_qpair_complete_error_reqs(struct spdk_nvme_qpair *qpair);
1329 : int nvme_qpair_submit_request(struct spdk_nvme_qpair *qpair,
1330 : struct nvme_request *req);
1331 : void nvme_qpair_abort_all_queued_reqs(struct spdk_nvme_qpair *qpair);
1332 : uint32_t nvme_qpair_abort_queued_reqs_with_cbarg(struct spdk_nvme_qpair *qpair, void *cmd_cb_arg);
1333 : void nvme_qpair_abort_queued_reqs(struct spdk_nvme_qpair *qpair);
1334 : void nvme_qpair_resubmit_requests(struct spdk_nvme_qpair *qpair, uint32_t num_requests);
1335 : int nvme_ctrlr_identify_active_ns(struct spdk_nvme_ctrlr *ctrlr);
1336 : void nvme_ns_set_identify_data(struct spdk_nvme_ns *ns);
1337 : void nvme_ns_set_id_desc_list_data(struct spdk_nvme_ns *ns);
1338 : void nvme_ns_free_zns_specific_data(struct spdk_nvme_ns *ns);
1339 : void nvme_ns_free_nvm_specific_data(struct spdk_nvme_ns *ns);
1340 : void nvme_ns_free_iocs_specific_data(struct spdk_nvme_ns *ns);
1341 : bool nvme_ns_has_supported_iocs_specific_data(struct spdk_nvme_ns *ns);
1342 : int nvme_ns_construct(struct spdk_nvme_ns *ns, uint32_t id,
1343 : struct spdk_nvme_ctrlr *ctrlr);
1344 : void nvme_ns_destruct(struct spdk_nvme_ns *ns);
1345 : int nvme_ns_cmd_zone_append_with_md(struct spdk_nvme_ns *ns, struct spdk_nvme_qpair *qpair,
1346 : void *buffer, void *metadata, uint64_t zslba,
1347 : uint32_t lba_count, spdk_nvme_cmd_cb cb_fn, void *cb_arg,
1348 : uint32_t io_flags, uint16_t apptag_mask, uint16_t apptag);
1349 : int nvme_ns_cmd_zone_appendv_with_md(struct spdk_nvme_ns *ns, struct spdk_nvme_qpair *qpair,
1350 : uint64_t zslba, uint32_t lba_count,
1351 : spdk_nvme_cmd_cb cb_fn, void *cb_arg, uint32_t io_flags,
1352 : spdk_nvme_req_reset_sgl_cb reset_sgl_fn,
1353 : spdk_nvme_req_next_sge_cb next_sge_fn, void *metadata,
1354 : uint16_t apptag_mask, uint16_t apptag);
1355 :
1356 : int nvme_fabric_ctrlr_set_reg_4(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, uint32_t value);
1357 : int nvme_fabric_ctrlr_set_reg_8(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, uint64_t value);
1358 : int nvme_fabric_ctrlr_get_reg_4(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, uint32_t *value);
1359 : int nvme_fabric_ctrlr_get_reg_8(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, uint64_t *value);
1360 : int nvme_fabric_ctrlr_set_reg_4_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
1361 : uint32_t value, spdk_nvme_reg_cb cb_fn, void *cb_arg);
1362 : int nvme_fabric_ctrlr_set_reg_8_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
1363 : uint64_t value, spdk_nvme_reg_cb cb_fn, void *cb_arg);
1364 : int nvme_fabric_ctrlr_get_reg_4_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
1365 : spdk_nvme_reg_cb cb_fn, void *cb_arg);
1366 : int nvme_fabric_ctrlr_get_reg_8_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
1367 : spdk_nvme_reg_cb cb_fn, void *cb_arg);
1368 : int nvme_fabric_ctrlr_scan(struct spdk_nvme_probe_ctx *probe_ctx, bool direct_connect);
1369 : int nvme_fabric_ctrlr_discover(struct spdk_nvme_ctrlr *ctrlr,
1370 : struct spdk_nvme_probe_ctx *probe_ctx);
1371 : int nvme_fabric_qpair_connect(struct spdk_nvme_qpair *qpair, uint32_t num_entries);
1372 : int nvme_fabric_qpair_connect_async(struct spdk_nvme_qpair *qpair, uint32_t num_entries);
1373 : int nvme_fabric_qpair_connect_poll(struct spdk_nvme_qpair *qpair);
1374 : bool nvme_fabric_qpair_auth_required(struct spdk_nvme_qpair *qpair);
1375 : int nvme_fabric_qpair_authenticate_async(struct spdk_nvme_qpair *qpair);
1376 : int nvme_fabric_qpair_authenticate_poll(struct spdk_nvme_qpair *qpair);
1377 :
1378 : typedef int (*spdk_nvme_parse_ana_log_page_cb)(
1379 : const struct spdk_nvme_ana_group_descriptor *desc, void *cb_arg);
1380 : int nvme_ctrlr_parse_ana_log_page(struct spdk_nvme_ctrlr *ctrlr,
1381 : spdk_nvme_parse_ana_log_page_cb cb_fn, void *cb_arg);
1382 :
1383 : static inline void
1384 223 : nvme_request_clear(struct nvme_request *req)
1385 : {
1386 : /*
1387 : * Only memset/zero fields that need it. All other fields
1388 : * will be initialized appropriately either later in this
1389 : * function, or before they are needed later in the
1390 : * submission patch. For example, the children
1391 : * TAILQ_ENTRY and following members are
1392 : * only used as part of I/O splitting so we avoid
1393 : * memsetting them until it is actually needed.
1394 : * They will be initialized in nvme_request_add_child()
1395 : * if the request is split.
1396 : */
1397 223 : memset(req, 0, offsetof(struct nvme_request, payload_size));
1398 223 : }
1399 :
1400 : #define NVME_INIT_REQUEST(req, _cb_fn, _cb_arg, _payload, _payload_size, _md_size) \
1401 : do { \
1402 : nvme_request_clear(req); \
1403 : req->cb_fn = _cb_fn; \
1404 : req->cb_arg = _cb_arg; \
1405 : req->payload = _payload; \
1406 : req->payload_size = _payload_size; \
1407 : req->md_size = _md_size; \
1408 : req->pid = g_spdk_nvme_pid; \
1409 : req->submit_tick = 0; \
1410 : req->accel_sequence = NULL; \
1411 : } while (0);
1412 :
1413 : static inline struct nvme_request *
1414 234 : nvme_allocate_request(struct spdk_nvme_qpair *qpair,
1415 : const struct nvme_payload *payload, uint32_t payload_size, uint32_t md_size,
1416 : spdk_nvme_cmd_cb cb_fn, void *cb_arg)
1417 : {
1418 : struct nvme_request *req;
1419 :
1420 234 : req = STAILQ_FIRST(&qpair->free_req);
1421 234 : if (req == NULL) {
1422 14 : return req;
1423 : }
1424 :
1425 220 : STAILQ_REMOVE_HEAD(&qpair->free_req, stailq);
1426 220 : qpair->num_outstanding_reqs++;
1427 :
1428 220 : NVME_INIT_REQUEST(req, cb_fn, cb_arg, *payload, payload_size, md_size);
1429 :
1430 220 : return req;
1431 : }
1432 :
1433 : static inline struct nvme_request *
1434 118 : nvme_allocate_request_contig(struct spdk_nvme_qpair *qpair,
1435 : void *buffer, uint32_t payload_size,
1436 : spdk_nvme_cmd_cb cb_fn, void *cb_arg)
1437 : {
1438 118 : struct nvme_payload payload;
1439 :
1440 118 : payload = NVME_PAYLOAD_CONTIG(buffer, NULL);
1441 :
1442 118 : return nvme_allocate_request(qpair, &payload, payload_size, 0, cb_fn, cb_arg);
1443 : }
1444 :
1445 : static inline struct nvme_request *
1446 76 : nvme_allocate_request_null(struct spdk_nvme_qpair *qpair, spdk_nvme_cmd_cb cb_fn, void *cb_arg)
1447 : {
1448 76 : return nvme_allocate_request_contig(qpair, NULL, 0, cb_fn, cb_arg);
1449 : }
1450 :
1451 : struct nvme_request *nvme_allocate_request_user_copy(struct spdk_nvme_qpair *qpair,
1452 : void *buffer, uint32_t payload_size,
1453 : spdk_nvme_cmd_cb cb_fn, void *cb_arg, bool host_to_controller);
1454 :
1455 : static inline void
1456 159 : _nvme_free_request(struct nvme_request *req, struct spdk_nvme_qpair *qpair)
1457 : {
1458 159 : assert(req != NULL);
1459 159 : assert(req->num_children == 0);
1460 159 : assert(qpair != NULL);
1461 :
1462 : /* The reserved_req does not go in the free_req STAILQ - it is
1463 : * saved only for use with a FABRICS/CONNECT command.
1464 : */
1465 159 : if (spdk_likely(qpair->reserved_req != req)) {
1466 159 : STAILQ_INSERT_HEAD(&qpair->free_req, req, stailq);
1467 :
1468 159 : assert(qpair->num_outstanding_reqs > 0);
1469 159 : qpair->num_outstanding_reqs--;
1470 : }
1471 159 : }
1472 :
1473 : static inline void
1474 143 : nvme_free_request(struct nvme_request *req)
1475 : {
1476 143 : _nvme_free_request(req, req->qpair);
1477 143 : }
1478 :
1479 : static inline void
1480 16 : nvme_complete_request(spdk_nvme_cmd_cb cb_fn, void *cb_arg, struct spdk_nvme_qpair *qpair,
1481 : struct nvme_request *req, struct spdk_nvme_cpl *cpl)
1482 : {
1483 16 : struct spdk_nvme_cpl err_cpl;
1484 : struct nvme_error_cmd *cmd;
1485 :
1486 16 : if (spdk_unlikely(req->accel_sequence != NULL)) {
1487 0 : struct spdk_nvme_poll_group *pg = qpair->poll_group->group;
1488 :
1489 : /* Transports are required to execute the sequence and clear req->accel_sequence.
1490 : * If it's left non-NULL it must mean the request is failed. */
1491 0 : assert(spdk_nvme_cpl_is_error(cpl));
1492 0 : pg->accel_fn_table.abort_sequence(req->accel_sequence);
1493 0 : req->accel_sequence = NULL;
1494 : }
1495 :
1496 : /* error injection at completion path,
1497 : * only inject for successful completed commands
1498 : */
1499 16 : if (spdk_unlikely(!TAILQ_EMPTY(&qpair->err_cmd_head) &&
1500 : !spdk_nvme_cpl_is_error(cpl))) {
1501 2 : TAILQ_FOREACH(cmd, &qpair->err_cmd_head, link) {
1502 :
1503 1 : if (cmd->do_not_submit) {
1504 0 : continue;
1505 : }
1506 :
1507 1 : if ((cmd->opc == req->cmd.opc) && cmd->err_count) {
1508 :
1509 0 : err_cpl = *cpl;
1510 0 : err_cpl.status.sct = cmd->status.sct;
1511 0 : err_cpl.status.sc = cmd->status.sc;
1512 :
1513 0 : cpl = &err_cpl;
1514 0 : cmd->err_count--;
1515 0 : break;
1516 : }
1517 : }
1518 : }
1519 :
1520 : /* For PCIe completions, we want to avoid touching the req itself to avoid
1521 : * dependencies on loading those cachelines. So call the internal helper
1522 : * function instead using the qpair that was passed by the caller, instead
1523 : * of getting it from the req.
1524 : */
1525 16 : _nvme_free_request(req, qpair);
1526 :
1527 16 : if (spdk_likely(cb_fn)) {
1528 15 : cb_fn(cb_arg, cpl);
1529 : }
1530 16 : }
1531 :
1532 : static inline void
1533 6 : nvme_cleanup_user_req(struct nvme_request *req)
1534 : {
1535 6 : if (req->user_buffer && req->payload_size) {
1536 2 : spdk_free(req->payload.contig_or_cb_arg);
1537 2 : req->user_buffer = NULL;
1538 : }
1539 :
1540 6 : req->user_cb_arg = NULL;
1541 6 : req->user_cb_fn = NULL;
1542 6 : }
1543 :
1544 : static inline bool
1545 3 : nvme_request_abort_match(struct nvme_request *req, void *cmd_cb_arg)
1546 : {
1547 4 : return req->cb_arg == cmd_cb_arg ||
1548 4 : req->user_cb_arg == cmd_cb_arg ||
1549 1 : (req->parent != NULL && req->parent->cb_arg == cmd_cb_arg);
1550 : }
1551 :
1552 : static inline void
1553 42 : nvme_qpair_set_state(struct spdk_nvme_qpair *qpair, enum nvme_qpair_state state)
1554 : {
1555 42 : qpair->state = state;
1556 42 : if (state == NVME_QPAIR_ENABLED) {
1557 24 : qpair->is_new_qpair = false;
1558 : }
1559 42 : }
1560 :
1561 : static inline enum nvme_qpair_state
1562 136 : nvme_qpair_get_state(struct spdk_nvme_qpair *qpair) {
1563 136 : return qpair->state;
1564 : }
1565 :
1566 : static inline void
1567 70 : nvme_request_remove_child(struct nvme_request *parent, struct nvme_request *child)
1568 : {
1569 70 : assert(parent != NULL);
1570 70 : assert(child != NULL);
1571 70 : assert(child->parent == parent);
1572 70 : assert(parent->num_children != 0);
1573 :
1574 70 : parent->num_children--;
1575 70 : child->parent = NULL;
1576 70 : TAILQ_REMOVE(&parent->children, child, child_tailq);
1577 70 : }
1578 :
1579 : static inline void
1580 0 : nvme_cb_complete_child(void *child_arg, const struct spdk_nvme_cpl *cpl)
1581 : {
1582 0 : struct nvme_request *child = child_arg;
1583 0 : struct nvme_request *parent = child->parent;
1584 :
1585 0 : nvme_request_remove_child(parent, child);
1586 :
1587 0 : if (spdk_nvme_cpl_is_error(cpl)) {
1588 0 : memcpy(&parent->parent_status, cpl, sizeof(*cpl));
1589 : }
1590 :
1591 0 : if (parent->num_children == 0) {
1592 0 : nvme_complete_request(parent->cb_fn, parent->cb_arg, parent->qpair,
1593 : parent, &parent->parent_status);
1594 : }
1595 0 : }
1596 :
1597 : static inline void
1598 57 : nvme_request_add_child(struct nvme_request *parent, struct nvme_request *child)
1599 : {
1600 57 : assert(parent->num_children != UINT16_MAX);
1601 :
1602 57 : if (parent->num_children == 0) {
1603 : /*
1604 : * Defer initialization of the children TAILQ since it falls
1605 : * on a separate cacheline. This ensures we do not touch this
1606 : * cacheline except on request splitting cases, which are
1607 : * relatively rare.
1608 : */
1609 15 : TAILQ_INIT(&parent->children);
1610 15 : parent->parent = NULL;
1611 15 : memset(&parent->parent_status, 0, sizeof(struct spdk_nvme_cpl));
1612 : }
1613 :
1614 57 : parent->num_children++;
1615 57 : TAILQ_INSERT_TAIL(&parent->children, child, child_tailq);
1616 57 : child->parent = parent;
1617 57 : child->cb_fn = nvme_cb_complete_child;
1618 57 : child->cb_arg = child;
1619 57 : }
1620 :
1621 : static inline void
1622 69 : nvme_request_free_children(struct nvme_request *req)
1623 : {
1624 : struct nvme_request *child, *tmp;
1625 :
1626 69 : if (req->num_children == 0) {
1627 57 : return;
1628 : }
1629 :
1630 : /* free all child nvme_request */
1631 62 : TAILQ_FOREACH_SAFE(child, &req->children, child_tailq, tmp) {
1632 50 : nvme_request_remove_child(req, child);
1633 50 : nvme_request_free_children(child);
1634 50 : nvme_free_request(child);
1635 : }
1636 : }
1637 :
1638 : int nvme_request_check_timeout(struct nvme_request *req, uint16_t cid,
1639 : struct spdk_nvme_ctrlr_process *active_proc, uint64_t now_tick);
1640 : uint64_t nvme_get_quirks(const struct spdk_pci_id *id);
1641 :
1642 : int nvme_robust_mutex_init_shared(pthread_mutex_t *mtx);
1643 : int nvme_robust_mutex_init_recursive_shared(pthread_mutex_t *mtx);
1644 :
1645 : bool nvme_completion_is_retry(const struct spdk_nvme_cpl *cpl);
1646 :
1647 : struct spdk_nvme_ctrlr *nvme_get_ctrlr_by_trid_unsafe(
1648 : const struct spdk_nvme_transport_id *trid, const char *hostnqn);
1649 :
1650 : const struct spdk_nvme_transport *nvme_get_transport(const char *transport_name);
1651 : const struct spdk_nvme_transport *nvme_get_first_transport(void);
1652 : const struct spdk_nvme_transport *nvme_get_next_transport(const struct spdk_nvme_transport
1653 : *transport);
1654 : void nvme_ctrlr_update_namespaces(struct spdk_nvme_ctrlr *ctrlr);
1655 :
1656 : /* Transport specific functions */
1657 : struct spdk_nvme_ctrlr *nvme_transport_ctrlr_construct(const struct spdk_nvme_transport_id *trid,
1658 : const struct spdk_nvme_ctrlr_opts *opts,
1659 : void *devhandle);
1660 : int nvme_transport_ctrlr_destruct(struct spdk_nvme_ctrlr *ctrlr);
1661 : int nvme_transport_ctrlr_scan(struct spdk_nvme_probe_ctx *probe_ctx, bool direct_connect);
1662 : int nvme_transport_ctrlr_scan_attached(struct spdk_nvme_probe_ctx *probe_ctx);
1663 : int nvme_transport_ctrlr_enable(struct spdk_nvme_ctrlr *ctrlr);
1664 : int nvme_transport_ctrlr_ready(struct spdk_nvme_ctrlr *ctrlr);
1665 : int nvme_transport_ctrlr_set_reg_4(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, uint32_t value);
1666 : int nvme_transport_ctrlr_set_reg_8(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, uint64_t value);
1667 : int nvme_transport_ctrlr_get_reg_4(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, uint32_t *value);
1668 : int nvme_transport_ctrlr_get_reg_8(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, uint64_t *value);
1669 : int nvme_transport_ctrlr_set_reg_4_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
1670 : uint32_t value, spdk_nvme_reg_cb cb_fn, void *cb_arg);
1671 : int nvme_transport_ctrlr_set_reg_8_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
1672 : uint64_t value, spdk_nvme_reg_cb cb_fn, void *cb_arg);
1673 : int nvme_transport_ctrlr_get_reg_4_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
1674 : spdk_nvme_reg_cb cb_fn, void *cb_arg);
1675 : int nvme_transport_ctrlr_get_reg_8_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
1676 : spdk_nvme_reg_cb cb_fn, void *cb_arg);
1677 : uint32_t nvme_transport_ctrlr_get_max_xfer_size(struct spdk_nvme_ctrlr *ctrlr);
1678 : uint16_t nvme_transport_ctrlr_get_max_sges(struct spdk_nvme_ctrlr *ctrlr);
1679 : struct spdk_nvme_qpair *nvme_transport_ctrlr_create_io_qpair(struct spdk_nvme_ctrlr *ctrlr,
1680 : uint16_t qid, const struct spdk_nvme_io_qpair_opts *opts);
1681 : int nvme_transport_ctrlr_reserve_cmb(struct spdk_nvme_ctrlr *ctrlr);
1682 : void *nvme_transport_ctrlr_map_cmb(struct spdk_nvme_ctrlr *ctrlr, size_t *size);
1683 : int nvme_transport_ctrlr_unmap_cmb(struct spdk_nvme_ctrlr *ctrlr);
1684 : int nvme_transport_ctrlr_enable_pmr(struct spdk_nvme_ctrlr *ctrlr);
1685 : int nvme_transport_ctrlr_disable_pmr(struct spdk_nvme_ctrlr *ctrlr);
1686 : void *nvme_transport_ctrlr_map_pmr(struct spdk_nvme_ctrlr *ctrlr, size_t *size);
1687 : int nvme_transport_ctrlr_unmap_pmr(struct spdk_nvme_ctrlr *ctrlr);
1688 : void nvme_transport_ctrlr_delete_io_qpair(struct spdk_nvme_ctrlr *ctrlr,
1689 : struct spdk_nvme_qpair *qpair);
1690 : int nvme_transport_ctrlr_connect_qpair(struct spdk_nvme_ctrlr *ctrlr,
1691 : struct spdk_nvme_qpair *qpair);
1692 : void nvme_transport_ctrlr_disconnect_qpair(struct spdk_nvme_ctrlr *ctrlr,
1693 : struct spdk_nvme_qpair *qpair);
1694 : void nvme_transport_ctrlr_disconnect_qpair_done(struct spdk_nvme_qpair *qpair);
1695 : int nvme_transport_ctrlr_get_memory_domains(const struct spdk_nvme_ctrlr *ctrlr,
1696 : struct spdk_memory_domain **domains, int array_size);
1697 : void nvme_transport_qpair_abort_reqs(struct spdk_nvme_qpair *qpair);
1698 : int nvme_transport_qpair_reset(struct spdk_nvme_qpair *qpair);
1699 : int nvme_transport_qpair_submit_request(struct spdk_nvme_qpair *qpair, struct nvme_request *req);
1700 : int32_t nvme_transport_qpair_process_completions(struct spdk_nvme_qpair *qpair,
1701 : uint32_t max_completions);
1702 : void nvme_transport_admin_qpair_abort_aers(struct spdk_nvme_qpair *qpair);
1703 : int nvme_transport_qpair_iterate_requests(struct spdk_nvme_qpair *qpair,
1704 : int (*iter_fn)(struct nvme_request *req, void *arg),
1705 : void *arg);
1706 : int nvme_transport_qpair_authenticate(struct spdk_nvme_qpair *qpair);
1707 :
1708 : struct spdk_nvme_transport_poll_group *nvme_transport_poll_group_create(
1709 : const struct spdk_nvme_transport *transport);
1710 : struct spdk_nvme_transport_poll_group *nvme_transport_qpair_get_optimal_poll_group(
1711 : const struct spdk_nvme_transport *transport,
1712 : struct spdk_nvme_qpair *qpair);
1713 : int nvme_transport_poll_group_add(struct spdk_nvme_transport_poll_group *tgroup,
1714 : struct spdk_nvme_qpair *qpair);
1715 : int nvme_transport_poll_group_remove(struct spdk_nvme_transport_poll_group *tgroup,
1716 : struct spdk_nvme_qpair *qpair);
1717 : int nvme_transport_poll_group_disconnect_qpair(struct spdk_nvme_qpair *qpair);
1718 : int nvme_transport_poll_group_connect_qpair(struct spdk_nvme_qpair *qpair);
1719 : int64_t nvme_transport_poll_group_process_completions(struct spdk_nvme_transport_poll_group *tgroup,
1720 : uint32_t completions_per_qpair, spdk_nvme_disconnected_qpair_cb disconnected_qpair_cb);
1721 : int nvme_transport_poll_group_destroy(struct spdk_nvme_transport_poll_group *tgroup);
1722 : int nvme_transport_poll_group_get_stats(struct spdk_nvme_transport_poll_group *tgroup,
1723 : struct spdk_nvme_transport_poll_group_stat **stats);
1724 : void nvme_transport_poll_group_free_stats(struct spdk_nvme_transport_poll_group *tgroup,
1725 : struct spdk_nvme_transport_poll_group_stat *stats);
1726 : enum spdk_nvme_transport_type nvme_transport_get_trtype(const struct spdk_nvme_transport
1727 : *transport);
1728 : /*
1729 : * Below ref related functions must be called with the global
1730 : * driver lock held for the multi-process condition.
1731 : * Within these functions, the per ctrlr ctrlr_lock is also
1732 : * acquired for the multi-thread condition.
1733 : */
1734 : void nvme_ctrlr_proc_get_ref(struct spdk_nvme_ctrlr *ctrlr);
1735 : void nvme_ctrlr_proc_put_ref(struct spdk_nvme_ctrlr *ctrlr);
1736 : int nvme_ctrlr_get_ref_count(struct spdk_nvme_ctrlr *ctrlr);
1737 :
1738 : int nvme_ctrlr_reinitialize_io_qpair(struct spdk_nvme_ctrlr *ctrlr, struct spdk_nvme_qpair *qpair);
1739 : int nvme_parse_addr(struct sockaddr_storage *sa, int family,
1740 : const char *addr, const char *service, long int *port);
1741 : int nvme_get_default_hostnqn(char *buf, int len);
1742 :
1743 : static inline bool
1744 5 : _is_page_aligned(uint64_t address, uint64_t page_size)
1745 : {
1746 5 : return (address & (page_size - 1)) == 0;
1747 : }
1748 :
1749 : #endif /* __NVME_INTERNAL_H__ */
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